Electronics-Integrated Circuits and Devices(Date:2010/08/19)

Presentation
Study of stacked MRAM for universal memory

Shouto TAMAI,  Shigeyoshi WATANABE,  

[Date]2010/8/19
[Paper #]ICD2010-57,SDM2010-142
Study of stacked FeRAM using ITO channel

Koichi SUGANO,  Shigeyoshi WATANABE,  

[Date]2010/8/19
[Paper #]ICD2010-58,SDM2010-143
Direct Measurement and Analysis of Static Noise Margin in SRAM Cells Using DMA TEG

Toshiro Hiramoto,  Makoto Suzuki,  Takuya Saraya,  Ken Shimizu,  Akio Nishida,  Shiro Kamohara,  Kiyoshi Takeuchi,  Tohru Mogami,  

[Date]2010/8/19
[Paper #]ICD2010-59,SDM2010-144
70% Read Margin Enhancement by V_ Mismatch Self-Repair in 6T-SRAM with Asymmetric Pass Gate Transistor by Zero Additional Cost, Post-Process, Local Electron Injection

Kousuke MIYAJI,  Shuhei TANAKAMARU,  Kentaro HONDA,  Shinji MIYANO,  Ken TAKEUCHI,  

[Date]2010/8/19
[Paper #]ICD2010-60,SDM2010-145
A 65nm Bistable Cross-coupled Dual Modular Redundancy Flip-Flop Capable of Protecting Soft Errors on the C-element

Jun FURUTA,  Chikara HAMANAKA,  Kazutoshi KOBAYASHI,  Hidetoshi ONODERA,  

[Date]2010/8/19
[Paper #]ICD2010-61,SDM2010-146
Application of Spin MOSFET to Nonvolatile and Reconfigurable LSIs

Tomoaki INOKUCHI,  Takao MARUKAME,  Tetsufumi TANAMOTO,  Hideyuki SUGIYAMA,  Mizue ISHIJKAWA,  Yoshiaki SAITO,  

[Date]2010/8/19
[Paper #]ICD2010-62,SDM2010-147
Circuit design of reconfigurable logic based on MOS double gate/Carbon Nano Tube transistor

Takamichi HAYASHI,  Shigeyoshi WATANABE,  

[Date]2010/8/19
[Paper #]ICD2010-63,SDM2010-148
Pattern Layout Methods of System LSI with SGT

Takahiro KODAMA,  Shigeyoshi WATANABE,  

[Date]2010/8/19
[Paper #]ICD2010-64,SDM2010-149
Random Drain Current Variation Caused by "Current-Onset Voltage" Variability in Scaled MOSFETs

Tomoko MIZUTANI,  Takaaki TSUNOMURA,  Anil KUMAR,  Akio NISHIDA,  Kiyoshi TAKEUCHI,  Satoshi INABA,  Shiro KAMOHARA,  Kazuo TERADA,  Tohru MOGAMI,  Toshiro HIRAMOTO,  

[Date]2010/8/19
[Paper #]ICD2010-65,SDM2010-150
On the Gate-Stack Origin Threshold Voltage Variability in Scaled FinFETs and Multi-FinFETs

Yongxun LIU,  Kazuhiko ENDO,  Shinichi OUCHI,  Takahiro KAMEI,  Junichi TSUKADA,  Hiromi YAMAUCHI,  Yuki ISHIKAWA,  Tetsuro HAYASHIDA,  Kunihiro SAKAMOTO,  Takashi MATSUKAWA,  Atsushi OGURA,  Meishoku MASAHARA,  

[Date]2010/8/19
[Paper #]ICD2010-66,SDM2010-151
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[Date]2010/8/19
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