| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| RECONF |
2005-11-30
14:40 |
Fukuoka |
Kitakyushu International Conference Center |
Variable Grain Logic Cell Architecture for Reconfigurable Device
Motoki Amagasaki, Hideaki Nakayama, Naoto Hamabe, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
Reconfigurable logic devices are classified into the fine-grained approach and the coarse-grained approach
by the granu... [more] |
RECONF2005-53
pp.1-6 |
| RECONF |
2005-11-30
15:05 |
Fukuoka |
Kitakyushu International Conference Center |
Implementation of Basic Function Blocks for Variable Grain Logic Cell
Naoto Hamabe, Hideaki Nakayama, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
We can devide commercially avairable reconfigurable logic devices into two categories by processing data size, one is a ... [more] |
RECONF2005-54
pp.7-12 |
| RECONF |
2005-11-30
15:30 |
Fukuoka |
Kitakyushu International Conference Center |
A study of reconfigurable hardware architecture for physical layer of wireless access systems
Yoshio Wada (Samsung Yokohama Research Institute) |
[more] |
RECONF2005-55
pp.13-18 |
| RECONF |
2005-11-30
16:10 |
Fukuoka |
Kitakyushu International Conference Center |
Implementation of 1-D/2-D FFT on the Dynamically Reconfigurable Processor DAPDNA-2
Kosuke Shiba, Atsushi Imaizumi, Takeshi Sakuma (IPFlex) |
The Fast Fourier Transform (FFT), which is applied to extensive fields as a basic technology of various digital signal p... [more] |
RECONF2005-56
pp.19-24 |
| RECONF |
2005-11-30
16:35 |
Fukuoka |
Kitakyushu International Conference Center |
Adaptive Computling on the Dynamically Reconfigurable Processor DRP-1
Shohei Abe, Yohei Hasegawa (Keio Univ.), Takao Toi, Takeshi Inuo (NEC System Devices Research Labs.), Hideharu Amano (Keio Univ.) |
Adaptive computing is one of the power reduction methods to take full advantage of reconfigurable devices. The approach,... [more] |
RECONF2005-57
pp.25-30 |
| RECONF |
2005-11-30
17:00 |
Fukuoka |
Kitakyushu International Conference Center |
A New Design Method for Implementing Real-Time Embedded Systems on Dynamically Reconfigurable Processors
Ryo Nakahashi, Tomoya Kitani (Osaka Univ.), Keiichi Yasumoto (NAIST), Akio Nakata, Teruo Higashino (Osaka Univ.) |
The dynamically reconfigurable processor (DRP, hereafter) has multiple different circuit patterns called contexts which ... [more] |
RECONF2005-58
pp.31-36 |
| RECONF |
2005-12-01
09:30 |
Fukuoka |
Kitakyushu International Conference Center |
A Study on Shortest Path Routing Algorithm on Reconfigurable Processor
Sho Shimizu, Yutaka Arakawa, Naoaki Yamanaka (Keio Univ.), Kosuke Shiba (IPFlex) |
n IP networks, we ordinally use OSPF(Open Shortest Path First) as a routing protocol. OSPF find the shortest path using ... [more] |
RECONF2005-59
pp.1-6 |
| RECONF |
2005-12-01
09:55 |
Fukuoka |
Kitakyushu International Conference Center |
Design of an application layer processing engine using dynamic reconfiguration
Yutaka Sugawara, Mary Inaba, Kei Hiraki (Univ. Tokyo) |
In this paper, we propose two techniques to reduce the performance overhead of reconfiguration when multiple application... [more] |
RECONF2005-60
pp.7-12 |
| RECONF |
2005-12-01
10:20 |
Fukuoka |
Kitakyushu International Conference Center |
A solution for perfect classified networks
Charlotte Roesener, Hidetaka Kojou, Hiroaki Nishi (Keio Univ.) |
This paper deals with a new solution for secure networks that shall be encrypted completely at all times and is against ... [more] |
RECONF2005-61
pp.13-18 |
| RECONF |
2005-12-01
11:00 |
Fukuoka |
Kitakyushu International Conference Center |
Anomaly Detection Mechanism installed in Dynamic Reconfigurable Processor
Takashi Isobe, Shinji Nishimura (Hitachi) |
The processors for network security request both large-throughput and flexibility to update anomaly prevention algorithm... [more] |
RECONF2005-62
pp.19-24 |
| RECONF |
2005-12-01
11:25 |
Fukuoka |
Kitakyushu International Conference Center |
Proposal of a virus check system using FPGA
Kei Shimane (Toho Univ.), Yosuke Iijima (Univ. Of Tsukuba), Eiichi Takahashi (AIST), Tatsumi Furuya (Toho Univ.), Tetsuya Higuchi (AIST) |
As regular broadband connections to the Internet are now common in homes, private users need to take measures against va... [more] |
RECONF2005-63
pp.25-30 |
| RECONF |
2005-12-01
11:50 |
Fukuoka |
Kitakyushu International Conference Center |
Permanent Fault Detection for FPGA by Reconfiguration
Yousuke Nakamura, Kei Hiraki (Tokyo Univ.) |
[more] |
RECONF2005-64
pp.31-36 |
| RECONF |
2005-12-01
13:30 |
Fukuoka |
Kitakyushu International Conference Center |
Architecture Overview of Reconfigurable Processor FE-GA for Digital Media Processing
Takanobu Tsunoda, Masashi Takada, Yohei Akita, Hiroshi Tanaka, Makoto Satoh, Masaki Ito (Hitachi) |
We developed a dynamically-reconfigurable processor Flexible Engine/Generic ALU array (FE-GA) targeting to digital media... [more] |
RECONF2005-65
pp.37-41 |
| RECONF |
2005-12-01
13:55 |
Fukuoka |
Kitakyushu International Conference Center |
Performance/Area Improvement of Reconfigurable Processor EF-GA by Hierarchical Memory Control of Configuration Data
Masashi Takada, Takanobu Tsunoda, Yohei Akita, Hiroshi Tanaka, Makoto Satoh, Masaki Ito (Hitachi) |
We are developing Flexible Engine/Generic ALU Array (FE-GA) that is a high-performance processor with two dimensional ar... [more] |
RECONF2005-66
pp.43-47 |
| RECONF |
2005-12-01
14:20 |
Fukuoka |
Kitakyushu International Conference Center |
Study of Audio Software on Reconfigurable Processor "FE-GA"
Hiroshi Tanaka, Takanobu Tsunoda, Yohei Akita, Masashi Takada, Masaki Ito, Makoto Satoh (Hitachi) |
The performance improvement by the frequency improvement of the processor becomes difficult in embedded LSI, and the pro... [more] |
RECONF2005-67
pp.49-53 |
| RECONF |
2005-12-01
14:45 |
Fukuoka |
Kitakyushu International Conference Center |
Mapping of FFT onto Reconfigurable Processor FE-GA
Makoto Satoh, Hiroshi Tanaka, Takanobu Tsunoda, Masashi Takada, Yohei Akita, Masaki Ito (Hitachi, Ltd.) |
Dynamically reconfigurable processors are getting popular in the fields such as wireless LAN, Audio, and Video processin... [more] |
RECONF2005-68
pp.55-60 |
| RECONF |
2005-12-01
15:25 |
Fukuoka |
Kitakyushu International Conference Center |
FPGA implementation of H.264/AVC encoder using soft processor core
Yutaka Okamoto, Keisuke Iwai, Takakazu Kurokawa (NDA) |
[more] |
RECONF2005-69
pp.61-66 |
| RECONF |
2005-12-01
15:50 |
Fukuoka |
Kitakyushu International Conference Center |
Motion controller on a reconfigurable device for birateral forceps robots
Ena Ishii, Hiroaki Nishi, Kouhei Ohnishi (Keio Univ.) |
In recent days, minimally invasive surgery by using endoscope has spread and the robot that supports endoscopic surgery ... [more] |
RECONF2005-70
pp.67-72 |
| RECONF |
2005-12-01
16:15 |
Fukuoka |
Kitakyushu International Conference Center |
A Study of The High-Speed Reconfigurable System for The Object Recognition
Hiroshi Kadota, Shingo Kasaki (Kyushu Univ.), Akiyoshi Wakatani (Konan Univ.) |
A high-speed reconfigurable system for the real-time object recognition in the motion pictures is proposed. The object-r... [more] |
RECONF2005-71
pp.73-78 |
| RECONF |
2005-12-02
09:30 |
Fukuoka |
Kitakyushu International Conference Center |
Development of a Reconfiguration Management Mechanism for Dynamically Reconfigurable System
Takanori Susaki, Isao Sakamoto, Hidetomo Shibamura, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
We have developed a dynamically reconfigurable system, which uses an embedded processor FPGA. In this system, an embedde... [more] |
RECONF2005-72
pp.1-6 |