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Technical Committee on Reconfigurable Systems (RECONF) (Searched in: 2012)
Search Results: Keywords 'from:2012-05-29 to:2012-05-29'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2012-05-29 09:00 |
Okinawa | Tiruru (Naha Okinawa, Japan) | An Acceleration of a Graph Cut Segmentation with FPGA Daichi Kobori, Tsutomu Maruyama (Univ. of Tsukuba)  RECONF2012-1 |
In this paper, we propose an FPGA implementation of the max-flow problem for the image segmentation by the graph cuts. T... [more] | RECONF2012-1 pp.1-6 |
| RECONF | 2012-05-29 09:25 |
Okinawa | Tiruru (Naha Okinawa, Japan) | An Imaging Device Control System Toru Yabuki, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) RECONF2012-2 |
[more] | RECONF2012-2 pp.7-12 |
| RECONF | 2012-05-29 09:50 |
Okinawa | Tiruru (Naha Okinawa, Japan) | FPGA implementation of a video-based real-time pupil detection method Yuma Hatanaka, Keisuke Dohi, Kazuhiro Negi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki City Univ) RECONF2012-3 |
[more] | RECONF2012-3 pp.13-18 |
| RECONF | 2012-05-29 10:35 |
Okinawa | Tiruru (Naha Okinawa, Japan) | A study on memory controller of MuCCRA-3: Dynamically Reconfigurable Processor Array Toru Katagiri, Kazuei Hironaka, Hideharu Amano (Keio Univ.) RECONF2012-4 |
In order to achieve a high performance on the Dynamically Reconfigurable Processor Array(DRPA), it is necessary to use P... [more] | RECONF2012-4 pp.19-24 |
| RECONF | 2012-05-29 11:00 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Development of a demonstration system for Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control Takashi Kawanami (KIT), Masakazu Hioki (AIST), Yohei Matsumoto (Kaiyo Univ.), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2012-5 |
The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by fine-grai... [more] | RECONF2012-5 pp.25-30 |
| RECONF | 2012-05-29 11:25 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Optimization of PE Array Interconnection on CMA to Reduce Configuration Data Rie Uno (keio Univ.), Nobuaki Ozaki, Hideharu Amano (Keio Univ.) RECONF2012-6 |
Cool Mega Array or CMA is a low power reconfigurable processor array for battery driven mobile devices.We developed a ... [more] |
RECONF2012-6 pp.31-36 |
| RECONF | 2012-05-29 13:10 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Implementation and Evaluation of FPGA-based Data Compression Hardware of Floating-Point Data-Stream Tomohiro Ueno, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) RECONF2012-7 |
This paper presents FPGA-based implementation and performance analysis of the hardware for lossless compression of a flo... [more] | RECONF2012-7 pp.37-42 |
| RECONF | 2012-05-29 13:35 |
Okinawa | Tiruru (Naha Okinawa, Japan) | An FPGA Implementation for a 3-layer Perceptron with the FDFM Processor Core Approach Yuki Agou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) RECONF2012-8 |
[more] | RECONF2012-8 pp.43-48 |
| RECONF | 2012-05-29 14:00 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Implementation of Square Root Calculator on Reconfigurable Processor DS-HIE Takashi Ueda, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2012-9 |
[more] | RECONF2012-9 pp.49-54 |
| RECONF | 2012-05-29 14:25 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Scalability Analysis of Tightly-Coupled FPGA-Cluster for Lattice Boltzmann Computation Yoshiaki Kono, Kentaro Sano, Ryotaro Chiba, Satoru Yamamoto (Tohoku Univ.) RECONF2012-10 |
This paper presents an architecture and its performance model of an LBM accelerator to be implemented on a tightly-coup... [more] |
RECONF2012-10 pp.55-60 |
| RECONF | 2012-05-29 15:10 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Hard error avoidance for TMR module using dynamic relocation in an FPGA Hiroki Tanaka, Yoshihiro Ichinomiya, Sadaki Usagawa, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-11 |
FPGA can recover from hard-error by reconfiguring itself, avoiding the hard-error part.Especially, the fault recovery ca... [more] | RECONF2012-11 pp.61-66 |
| RECONF | 2012-05-29 15:35 |
Okinawa | Tiruru (Naha Okinawa, Japan) | a design of an interconnection system of modules and a control unit of reconfiguration for embedded systems utilizing dynamic reconfiguration Tomokazu Mizuno, Yoshiaki Kida, Ryo Kamide, Shin Terada, Mitsuyoshi Tokuda, Tomonori Izumi (Ritsumeikan Univ.) RECONF2012-12 |
[more] | RECONF2012-12 pp.67-70 |
| RECONF | 2012-05-29 16:00 |
Okinawa | Tiruru (Naha Okinawa, Japan) | An Efficient Fault Detection and Avoidance Technique for FPGA Interconnects Yuuki Nishitani, Kazuki Inoue, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-13 |
FPGA's fault detection needs a great deal of test time as compared with ASIC because FPGAs have complex structures and p... [more] | RECONF2012-13 pp.71-76 |
| RECONF | 2012-05-29 16:45 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Implementation and evaluation of the AES/ADPCM on STP and FPGA with Behavioral Synthesis Yukihito Ishida, Seiya Shibata, Yuki Ando, Shinya Honda, Hiroaki Takada, Masato Edahiro (Nagoya Univ) RECONF2012-14 |
Reconfigurable techniques are attracting attention as an alternative to dedicated hardware of SoC. We have evaluated FP... [more] |
RECONF2012-14 pp.77-82 |
| RECONF | 2012-05-29 17:10 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Implementation of delay control methods for FPGA-based digital DC-DC Converters Yoshihiko Yamabe, Kanako Nakashima, Keisuke Dohi, Kazuma Hamawaki, Kentaro Yamashita, Kazuhiro Kajiwara, Fujio Kurokawa, Yuichiro Shibata, Kiyoshi Oguri (Univ.) RECONF2012-15 |
(To be available after the conference date) [more] | RECONF2012-15 pp.83-88 |
| RECONF | 2012-05-29 17:35 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Development of Application for Heterogeneous Multi-Core Processor Yusuke Koizumi, Eiichi Sasaki, Hideharu Amano (Keio Univ.), Ryuichi Sakamoto, Mitaro Namiki (Tkyo Univ. of Agri. and Tech.) RECONF2012-16 |
This paper describes the application development on a heterogeneous multi-core processor that consists of a CPU and acce... [more] | RECONF2012-16 pp.89-94 |
| RECONF | 2012-05-30 09:00 |
Okinawa | Tiruru (Naha Okinawa, Japan) | AN FPGA ACCELERATION OF A LEVEL SET SEGMENTATION METHOD Haruhisa Tsuyama, Tsutomu Maruyama (Tsukuba Univ.) RECONF2012-17 |
In this paper, we propose a new level set algorithm for real-time image segmentation, and its FPGA implementation. Our... [more] |
RECONF2012-17 pp.95-100 |
| RECONF | 2012-05-30 09:25 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Proposal and Evaluation of photon mapping acceleration using FPGA Takuya Kuhara, Masato Yoshimi, Mitsunori Miki (Doshisha Univ.) RECONF2012-18 |
Photon mapping enables the generation of the complex light environment as caustics, but requires vast amout of calcula... [more] |
RECONF2012-18 pp.101-106 |
| RECONF | 2012-05-30 09:50 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Real-time Corner and Polygon Detection System on FPGA Chunmeng Bi, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2012-19 |
In this paper, we propose a new corner detection algorithm and a polygon detection method based on the corner detection ... [more] | RECONF2012-19 pp.107-112 |
| RECONF | 2012-05-30 10:35 |
Okinawa | Tiruru (Naha Okinawa, Japan) | SOM-based FPGA Placement Method using Shimbel Index Tetsuro Hamada, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-20 |
A placement process is one of the heavily computational process in FPGA(Field Programmable Gate Array) design flow. Al... [more] |
RECONF2012-20 pp.113-118 |
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