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Technical Committee on Circuits and Systems (CAS) [schedule] [select]
Chair Toshihiko Takahashi (Niigata Univ.)
Vice Chair Mitsuru Hiraki (Renesas)
Secretary Shunsuke Koshita (Tohoku Univ.), Motoi Yamaguchi (Renesas)
Assistant Toshihiro Tachibana (Shonan Inst. of Tech.), Yohei Nakamura (Hitachi)

Technical Committee on VLSI Design Technologies (VLD) [schedule] [select]
Chair Takashi Takenana (NEC)
Vice Chair Hiroyuki Ochi (Ritsumeikan Univ.)
Secretary Daisuke Fukuda (Fujitsu Labs.), Shinobu Nagayama (Hiroshima City Univ.)
Assistant Parizy Matthieu (Fujitsu Labs.)

Technical Committee on Signal Processing (SIP) [schedule] [select]
Chair Makoto Nakashizuka (Chiba Inst. of Tech.)
Vice Chair Masahiro Okuda (Univ. of Kitakyushu), Shogo Muramatsu (Niigata Univ.)
Secretary Akira Hirabayashi (Ritsumeikan Univ.), Takamichi Miyata (Chiba Inst. of Tech.)
Assistant Osamu Watanabe (Takushoku Univ.)

Technical Committee on Mathematical Systems Science and its applications (MSS) [schedule] [select]
Chair Satoshi Yamane (Kanazawa Univ.)
Vice Chair Morikazu Nakamura (Univ. of Ryukyus)
Secretary Mitsuru Nakata (Yamaguchi Univ.), Ichiro Toyoshima (Toshiba)
Assistant Hideki Kinjo (Okinawa Univ.)

Conference Date Thu, Jun 16, 2016 09:30 - 18:00
Fri, Jun 17, 2016 09:30 - 17:40
Topics System, signal processing and related topics 
Conference Place  
Sponsors In cooperation with IEEE CEDA All Japan Joint Chapter, IEEE CAS Society Japan Chapter, IEEE SPS Tokyo Joint Chapter

Thu, Jun 16 AM 
09:30 - 10:50
(1) 09:30-09:50 Hardware Trojan Identification based on Netlist Features using Neural Networks Kento Hasegawa, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.)
(2) 09:50-10:10 Verification Experiment of Scan-based Attack against a Trivium Cipher Circut Daisuke Oku, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.)
(3) 10:10-10:30 Automatic Test Pattern Generation for Multiple Stuck-At Faults: When Testing for Single Faults is Insufficient Conrad JinYong Moore, Amir Masoud Gharehbaghi, Masahiro Fujita (Univ. of Tokyo)
(4) 10:30-10:50 On random test pattern generation algorithm considering signal transition activities Yusuke Matsunaga (Kyushu Univ.)
  10:50-11:00 Break ( 10 min. )
Thu, Jun 16 AM 
11:00 - 12:20
(5) 11:00-11:20 A descriptor system representation of circuit equations based on the reduced incidence matrix Daisuke Saito, Toshikazu Sekine, Yasuhiro Takahashi (Gifu Univ.)
(6) 11:20-11:40 Hardware Implementation of Stochastic Gammatone Filter Naoya Onizawa, Shunsuke Koshita, Shuichi Sakamoto, Masahide Abe, Masayuki Kawamata, Takahiro Hanyu (Tohoku Univ.)
(7) 11:40-12:00 A method of reducing amount of operations on the bit serial multiply-accumulator and its application Daichi Okamoto (Okayama Prefectural Univ.), Masafumi Kondo (Kawasaki Univ. of Medical Welfare), Yoshihiro Sejima, Tomoyuki Yokogawa, Kazutami Arimoto, Yoichiro Sato (Okayama Prefectural Univ.)
(8) 12:00-12:20 Significance Analysis for Edges in a Graph by means of Leveling Variables on Nodes Kento Hamada, Norihiko Shinomiya (Soka Univ.)
  12:20-13:20 Lunch Break ( 60 min. )
Thu, Jun 16 PM 
13:20 - 14:40
(9) 13:20-14:40 [Panel Discussion]
The Role of System and Signal Processing Subsociety
-- Encouragement and Development of Young Researchers --
Yoshinobu Kajikawa (Kansai Univ.), Shunsuke Koshita (Tohoku Univ.), Takashi Takenaka (NEC), Yuichi Tanaka (TUAT), Satoshi Yamane (Kanazawa Univ.)
  14:40-14:50 Break ( 10 min. )
Thu, Jun 16 PM 
14:50 - 16:10
(10) 14:50-15:10 Spectral Analysis of Universal Register Machine on Game of LIFE Shigeru Ninagawa (KIT)
(11) 15:10-15:30 Algorithm for Energy-saving Train Running Profile and Its Application Yukinori Tonosaki, Ken Aoki (Toshiba)
(12) 15:30-15:50 A Strategy for AP Selection with Mutual Concession in Sustainable Heterogeneous Wireless Networks Hideo Kobayashi, Eiichi Kameda, Yoshiaki Terashima, Norihiko Shinomiya (Soka Univ.)
(13) 15:50-16:10 Controllability Analysis of Boolean Networks Focusing on Attractors Koichi Kobayashi (Hokkaido Univ.)
  16:10-16:20 Break ( 10 min. )
Thu, Jun 16 PM 
16:20 - 18:00
(14) 16:20-16:40 Inverse Tone Mapping Based on Reinhard's Tone Mapping Operator Yuma Kinoshita, Sayaka Shiota, Hitoshi Kiya (Tokyo Metro. Univ.)
(15) 16:40-17:00 A generation scheme of random unitary matrices for template protection Yuko Saito, Sayaka Shiota, Hitoshi Kiya (Tokyo Metropolitan Univ.)
(16) 17:00-17:20 Image retrieval in JPEG 2000 codestream domain by a deep learning approach Yusuke Sugawara (Tokyo Metropolitan Univ), Osamu Watanabe (Takushoku Univ), Sayaka Shiota, Hitoshi Kiya (Tokyo Metropolitan Univ)
(17) 17:20-17:40 Improvement of restore accuracy of the Non-Uniformed Sampling method using nonlinear optimization Koki Degura (Tokyo Univ of Science), Tomoki Nakao (JEOL RESONANCE Co., Ltd.), Yuho Tanaka, Toshihiro Furukawa (Tokyo Univ of Science)
(18) 17:40-18:00 A Study on Sound Source Tracking via Two Microphones Based on MUSIC Kenta Omiya, Kenji Suyama (Tokyo Denki Univ.)
  - Banquet
Fri, Jun 17 AM 
09:30 - 10:50
(19) 09:30-09:50 Line selection to reduce store-energy in MTJ-based non-volatile caches Takamasa Fukasawa, Kimiyoshi Usami (SIT)
(20) 09:50-10:10 Design and Evaluation of MTJ-based Standard Cell Memory Junya Akaike, Masaru Kudo, Kimiyoshi Usami (SIT)
(21) 10:10-10:30 A Parallel Adder Circuit based on Optical Pass-gate Logic and Its Evaluation with Optoelectronic Circuit Simulator Tohru Ishihara (Kyoto Univ.), Akihiko Shinya (NTT), Koji Inoue (Kyushu Univ.), Kengo Nozaki, Masaya Notomi (NTT)
(22) 10:30-10:50 An FPGA Implementation of Real-time Optical Flow Estimation Processor Yu Suzuki, Masato Ito, Satoshi Kanda, Tetsuya Matsumura (Nihon Univ.), Kousuke Imamura, Yoshio Matsuda (Kanazawa Univ.)
  10:50-11:00 Break ( 10 min. )
Fri, Jun 17 AM 
11:00 - 12:20
(23) 11:00-11:20 After the Symposium "Case Studies and Open Problems in Digital Signal Processing Education" Shunsuke Koshita (Tohoku Univ.), Kenji Suyama (Tokyo Denki Univ.)
(24) 11:20-11:40 Equivalent Circuit Approach for Wave Propagation in Graphene-based Structures Hirofumi Sanada, Hiroki Matsuzaki, Naofumi Wada, Megumi Takezawa (HUS)
(25) 11:40-12:00 A weighted graph representation for new joint of technical committee conferences Yoshihiro Kaneko, Katsuaki Nakajima (Gifu Univ.)
(26) 12:00-12:20 A Design Method of IIR Filters by Adjusting Design Specification Kenzo Yamamoto, Kenji Suyama (Tokyo Denki Univ.)
  12:20-13:20 Lunch Break ( 60 min. )
Fri, Jun 17 PM 
13:20 - 15:00
(27) 13:20-13:40 A Study on Trajectory Estimation using Spatial Mapping of Microwave Doppler Signals Motoko Tachibana, Kurato Maeno (OKI)
(28) 13:40-14:00 Simultaneous Adaptation of Kernel Centers and Width for Kernel Adaptive Filter Tomoya Wada, Toshihisa Tanaka (TUAT)
(29) 14:00-14:20 Decoding of Cortical Entrainment when Listening to Natural Music Yuiko Kumagai, Toshihisa Tanaka (TUAT)
(30) 14:20-14:40 Study on Feedforward ANC system with Virtual sensing technique Shoma Edamoto, Chuang Shi, Yosinobu Kajikawa (Kansai Univ.)
(31) 14:40-15:00 Decoding of Rhythm Imagery from EEG Haruki Okawa, Kaori Suefusa, Toshihisa Tanaka (TUAT)
  15:00-15:10 Break ( 10 min. )
Fri, Jun 17 PM 
15:10 - 16:30
(32) 15:10-15:30 Clock Distribution Network with Multiple Source Buffers for Stacked Chips Nanako Niioka, Masashi Imai, Kaoru Furumi, Atsushi Kurokawa (Hirosaki Univ.)
(33) 15:30-15:50 Thermal Analysis in 3D ICs Kaoru Furumi, Masashi Imai, Nanako Niioka, Atsushi Kurokawa (Hirosaki Univ.)
(34) 15:50-16:10 A Study on Fault Tolerant Features of Asynchronous Circuits using Voted-enable Latches Masashi Imai (Hirosaki Univ.), Tomohiro Yoneda (NII)
(35) 16:10-16:30 Tamper Resistant Asynchronous Pipeline Circuits using Random Delay Elements Daiki Toyoshima, Atsushi Kurokawa, Masashi Imai (Hirosaki Univ.)
  16:30-16:40 Break ( 10 min. )
Fri, Jun 17 PM 
16:40 - 17:40
(36) 16:40-17:00 On Study of Data Reliability of Threshold Sensing with Majority Circuit Akito Hoshide, Bo Liu, Takuro Ishida, Shigetoshi Nakatake (Univ. of Kitakyushu)
(37) 17:00-17:20 Analog Characterization Module based on A/D and D/A Converters Daishi Isogai, Bo Liu, Futa Yoshinaka, Shigetoshi Nakatake (Univ. of Kitakyushu)
(38) 17:20-17:40 Soft-Coupling Module with A/D and D/A Converters Futa Yoshinaka, Bo Liu, Daishi Isogai, Shigetoshi Nakatake (univ.kitakyushu)

Announcement for Speakers
General TalkEach speech will have 15 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
CAS Technical Committee on Circuits and Systems (CAS)   [Latest Schedule]
Contact Address Shunsuke Koshita (Tohoku University)
TEL:022-795-7095
E-: simkecei 
VLD Technical Committee on VLSI Design Technologies (VLD)   [Latest Schedule]
Contact Address Daisuke Fukuda (Fujitsu Laboratories)
E-: d- 
Announcement See also VLD's homepage:
http://www.ieice.org/~vld/
SIP Technical Committee on Signal Processing (SIP)   [Latest Schedule]
Contact Address Akira Hirabayashi (Ritsumeikan University)
E: ahrbdiai 
MSS Technical Committee on Mathematical Systems Science and its applications (MSS)   [Latest Schedule]
Contact Address Mitsuru Nakata (Yamaguchi Univ.)
Tel: +81-83-933-5402
E-: mgu-u 


Last modified: 2016-05-25 10:06:39


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