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Technical Committee on Reconfigurable Systems (RECONF) (Searched in: 2012)
Search Results: Keywords 'from:2012-09-18 to:2012-09-18'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2012-09-18 09:30 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | FPGA-based video stabilisation Toru Yabuki, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba)  RECONF2012-24 |
This paper presents a real-time video stabilisation system using an FPGA. For hand-held motion picture camera in particu... [more] | RECONF2012-24 pp.1-6 |
| RECONF | 2012-09-18 09:55 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | A development of trafic-sign recognition system by using vector processor Venice Yoshiya Sugita, Tomoki Tomisawa, Masahiro Fukui (Ritsumeikan Univ.) RECONF2012-25 |
This paper presents a development of traffic-sign detection system by using vector processor Venice. Vector processor Ve... [more] | RECONF2012-25 pp.7-12 |
| RECONF | 2012-09-18 10:20 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | JPEG encoder design improvement and its evaluation for Dynamic Reconfigurable Circuit Hajime Sawano, Nobuyuki Araki, Takashi Kambe (Kinki Univ.) RECONF2012-26 |
Reconfigurable Computing (RC) has been proposed as a new paradigm to address the conflicting design requirements of high... [more] | RECONF2012-26 pp.13-18 |
| RECONF | 2012-09-18 11:10 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | An approach for generating new timbres by the use of an FPGA Suguru Ochiai, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) RECONF2012-27 |
Sound synthesis applications have being introduced to mobile computing in these years and they attract many users from ... [more] |
RECONF2012-27 pp.19-24 |
| RECONF | 2012-09-18 11:35 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | An Implementation and Evaluation of SOC Estimation System for Lithium-ion Battery by PSoC Masashi Fujimoto, Tatsuya Inoue, Lei Lin, Masahiro Fukui (Ritsumeikan Univ.) RECONF2012-28 |
Aiming at exact residual quantity(SOC, state of charge) estimation of a lithium-ion storage battery, we have analyzed th... [more] | RECONF2012-28 pp.25-30 |
| RECONF | 2012-09-18 13:20 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | [Invited Talk]
The LSI Design Methodology of Tamper Resistant Cryptographic Circuit Takeshi Fujino, Mitsuru Shiozaki, Takaya Kubota (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyo Uiv.) RECONF2012-29 |
Tamper LSI Design Methodology have to be applied in order to implement secure cryptographic circuit which is resistant t... [more] | RECONF2012-29 pp.31-36 |
| RECONF | 2012-09-18 14:25 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Area-Efficeint Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs Masanori Hariyama, Yoshiya Komatsu, Michitaka Kameyama (Tohoku Univ.) RECONF2012-30 |
[more] | RECONF2012-30 pp.37-42 |
| RECONF | 2012-09-18 14:50 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Architecture of an Asynchronous FPGA for Handshake-Component-Based Design Masanori Hariyama, Yoshiya Komatsu, Michitaka Kameyama (Tohoku Univ.) RECONF2012-31 |
[more] | RECONF2012-31 pp.43-47 |
| RECONF | 2012-09-18 15:15 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | An Area Minimized Logic Cluster using COGRE Logic Cell Toshiya Takahashi, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-32 |
These days, FPGAs (Field Programmable Gate Arrays) is required to increase in size and performance in order to deal w... [more] |
RECONF2012-32 pp.49-54 |
| RECONF | 2012-09-18 16:05 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Castle of Chips: A reconfigurable technique for multiple chips implementation Hideharu Amano (Keio Univ.) RECONF2012-33 |
[more] | RECONF2012-33 pp.55-60 |
| RECONF | 2012-09-18 16:30 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Study of "fine-grain dynamic partial reconfiguration mechanism" on FPGA Kunihiro Ueda, Naoki Kawamoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2012-34 |
Dynamic and partial reconfiguration (DRP) on SRAM-based FPGAs has received increasing attention, since Xilinx Inc. start... [more] | RECONF2012-34 pp.61-66 |
| RECONF | 2012-09-18 16:55 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Superimposing configuration acceleration method of an optically reconfigurable gate array including a speed adjustment bit Takashi Yoza, Minoru Watanabe (Shizuoka Univ.) RECONF2012-35 |
[more] | RECONF2012-35 pp.67-71 |
| RECONF | 2012-09-19 09:00 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Effects of Power Saving by Dynamic Partial Reconfiguration in Video Shape Detection Processing Naoki Kawamoto, Kunihiro Ueda, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2012-36 |
Some of recent FPGAs have the functionality of dynamic partial reconfiguration. By using this functionality, it is expec... [more] | RECONF2012-36 pp.73-78 |
| RECONF | 2012-09-19 09:25 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Fast Flaw Detection of Liquid Crystal Glass with a FPGA Board Keisuke Matsuyama, Lin Meng, Yasuo Tenjo, Katsuhiro Yamazaki (Ritsumeikan Univ.) RECONF2012-37 |
This research aims to improve the speed for detecting flaws of liquid glass with a FPGA board. First we reduce the noise... [more] | RECONF2012-37 pp.79-84 |
| RECONF | 2012-09-19 09:50 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Gray-level image detection of a dynamically reconfigurable vision-chip architecture Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito (Shizuoka Univ.) RECONF2012-38 |
[more] | RECONF2012-38 pp.85-88 |
| RECONF | 2012-09-19 10:40 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2-D FDTD Computation Masanori Hariyama, Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Michitaka Kameyama (Tohoku Univ.) RECONF2012-39 |
[more] | RECONF2012-39 pp.89-93 |
| RECONF | 2012-09-19 11:05 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Prototyping Tightly-Coupled FPGA Cluster for Lattice Boltzmann Computation Kentaro Sano, Yoshiaki Kono, Hayato Suzuki, Ryotaro Chiba, Satoru Yamamoto (Tohoku Univ.) RECONF2012-40 |
This paper presents a prototype of a tightly-coupled FPGA cluster for LBM computation, which is one of the computing met... [more] | RECONF2012-40 pp.95-100 |
| RECONF | 2012-09-19 11:30 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | OS for Multiple FPGA Clusters which have Different Communication Interfaces Akira Kojima, Tetsuo Hironaka (Hiroshima City Univ.) |
[more] | |
| RECONF | 2012-09-19 13:15 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | A Design Framework for Reconfigurable IPs with VLSI CADs Qian Zhao, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-41 |
The conventional FPGA design CAD flows evaluate FPGA architecture by implementing benchmarks through the following steps... [more] | RECONF2012-41 pp.101-106 |
| RECONF | 2012-09-19 13:40 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | A Circuit Synthesis Algorithm and Evaluation for Coarse Grained Dynamic Reconfigurable Circuits Nobuyuki Araki, Takashi Kambe (Kinki Univ.) RECONF2012-42 |
High level synthesis for Coarse-grained architecture Reconfigurable Computing(CGA-RC) from high-level description is urg... [more] | RECONF2012-42 pp.107-112 |
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