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=============================================== Technical Committee on Circuits and Systems (CAS) Chair: Yasuhiro Takashima (Univ. of Kitakyushu) Vice Chair: Hiroki Sato (Sony LSI Design) Secretary: Takahide Sato (Yamanashi Univ.), Shinji Shimoda (Sony LSI Design) Assistant: Motoi Yamaguchi (TECHNOPRO), Yohei Nakamura (Hitachi) =============================================== Technical Committee on VLSI Design Technologies (VLD) Chair: Daisuke Fukuda (Fujitsu Labs.) Vice Chair: Kazutoshi Kobayashi (Kyoto Inst. of Tech.) Secretary: Yuichi Sakurai (Hitachi), Daisuke Kanemoto (Osaka Univ.) Assistant: Kazuki Ikeda (Hitachi) =============================================== Technical Committee on Signal Processing (SIP) Chair: Naoyuki Aikawa (TUS) Vice Chair: Kazunori Hayashi (Osaka City Univ), Yukihiro Bandou (NTT) Secretary: Masayoshi Nakamoto (Hiroshima Univ.), Katsumi Konishi (Hosei Univ.) Assistant: Kenjiro Sugimoto (Waseda Univ.) =============================================== Technical Committee on Mathematical Systems Science and its applications (MSS) Chair: Shigemasa Takai (Osaka Univ.) Vice Chair: Atsuo Ozaki (Osaka Inst. of Tech.) Secretary: Takahumi Kanazawa (Setsunan Univ.), Koichi Kobayashi (Hokkaido Univ.) Assistant: Naoki Hayashi (Osaka Univ.) DATE: Thu, Jun 18, 2020 09:55 - 16:30 PLACE: Online(Please register from the following site.Please register from the following site.https://docs.google.com/forms/d/e/1FAIpQLSfxvszfuRd6lqEvLIQsQ_K7BPWEogZ6O8t6g4NgmnXSSj8XDw/viewform) TOPICS: ---------------------------------------- Thu, Jun 18 AM (09:55 - 10:00) ---------------------------------------- ---------------------------------------- Thu, Jun 18 AM (10:00 - 12:05) ---------------------------------------- (1) 10:00 - 10:25 The Construction of Logical Layer in the 3rd Digital Linguistic Evolution (Electronic Information) -- To become Homo Sapiens -- Kumon Tokumaru (Writer) (2) 10:25 - 10:50 On numerical approximated solutions of an ordinary differential\ equation using a LSTM neural network Kazuya Ozawa, Kaito Isogai, Hideaki Okazaki (SIT) (3) 10:50 - 11:15 A Study on AM-AM/PM Characteristics of RF Power Amplifiers Satoshi Tanaka (Murata Manufacturing) (4) 11:15 - 11:40 Application of Analytic Method of Lossless Telegrapher's Equation to Quantum Mechanics Nobuo Nagai (Hokkaido Univ.), Hirofumi Sanada (HUS) (5) 11:40 - 12:05 Role of Circuit Theory for Wave Phenomena in Physics Nobuo Nagai (Hokkaido Univ.), Hirofumi Sanada (HUS) ----- Lunch Break ( 65 min. ) ----- ---------------------------------------- Thu, Jun 18 PM (13:10 - 14:50) ---------------------------------------- (6) 13:10 - 13:35 Simultaneous Design of Controllers and Decentralized Event-Triggering Conditions for Cyber-Physical Systems Koichi Kobayashi, Kyohei Nakaima, Yuh Yamashita (Hokkaido Univ.) (7) 13:35 - 14:00 Characteristic Analyses and Generation of Maximally Asymmetric Functions Hiroshi Kanehagi, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (Hiroshima City Univ.) (8) 14:00 - 14:25 Optimal Design for Level-Shifter-Less Approach using Channel Length Modulation & Body Biasing Tatsuya Watanabe, Usami Kimiyoshi (SIT) (9) 14:25 - 14:50 Thermal transient analysis of the heat generation and design of temperature control circuit in three-dimensional stacked chip Tomoaki Oikawa, Kimiyoshi Usami (Shibaura Inst. of Tech.) ----- Break ( 10 min. ) ----- ---------------------------------------- Thu, Jun 18 PM (15:00 - 16:30) ---------------------------------------- (10) 15:00 - 16:30 [Panel Discussion] The role of System and Signal Processing Subsociety -- Pros & Cons of Online Video Meeting -- Shogo Muramatsu (Niigata Univ.), Shigemasa Takai (Osaka Univ.), Yasuhiro Takashima (Univ. of Kitakyushu), Kasunori Hayashi (Kyoto Univ.), Daisuke Fukuda (Fujitsu Lab.) # Information for speakers General Talk will have 20 minutes for presentation and 5 minutes for discussion. # CONFERENCE SPONSORS: - This conference is co-sponsored by IEEE Signal Processing Society Tokyo Joint Chapter. This conference is technical co-sponsored by IEEE Circuits and Systems Society Japan Chapter（IEEE CASS JC）.This conference is technical co-sponsored by IEEE CEDA All Japan Joint Chapter. === Technical Committee on Circuits and Systems (CAS) === # SECRETARY: Yohei Nakamura (Hitachi, Ltd.) TEL: 080-1072-8751 E-mail:   i     sj     === Technical Committee on VLSI Design Technologies (VLD) === # SECRETARY: Yuichi Sakurai (Hitachi) E-mail:  i  ixj# ANNOUNCEMENT: # See also VLD's homepage: http://www.ieice.org/~vld/ === Technical Committee on Signal Processing (SIP) === # FUTURE SCHEDULE: Thu, Aug 27, 2020 - Fri, Aug 28, 2020: Online [Wed, Jul 15] # SECRETARY: Masayoshi Nakamoto(Hiroshima University) Email: msy    -u === Technical Committee on Mathematical Systems Science and its applications (MSS) === # SECRETARY: Takafumi Kanazawa (Osaka University) Tel: +81-6-6850-6388 E-mail:    es -uLast modified: 2020-11-06 13:43:35 |
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