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Technical Committee on Reconfigurable Systems (RECONF) [schedule] [select]
Chair Minoru Watanabe (Shizuoka Univ.)
Vice Chair Masato Motomura (Hokkaido Univ.), Yuichiro Shibata (Nagasaki Univ.)
Secretary Yutaka Yamada (Toshiba), Yoshiki Yamaguchi (Univ. of Tsukuba)
Assistant Kazuya Tanikagawa (Hiroshima City Univ.), Takefumi Miyoshi (e-trees.Japan)

Conference Date Thu, May 19, 2016 09:00 - 20:30
Fri, May 20, 2016 09:00 - 14:30
Topics Reconfigurable Systems, etc. 
Conference Place Okada Memorial Hall, Fujitsu Laboratories LTD. 
Address 4-1-1 Kamikodanaka, Nakahara-ku, Kawasaki, Kanagawa 211-8588, Japan
Transportation Guide One minute walk distance from JR Musashi-Nakahara Station
http://www.fujitsu.com/jp/group/labs/en/about/facilities/kawasaki.html
Contact
Person
Yutaka Tamiya (Fujitsu Lab.) and Yoshiki Yamaguchi (Univ. Tsukuba)
+81-44-754-2613 (Venue)
Announcement Please join our social hour on 19th May.
Technical Committee on RECONF will be held from 1:00pm to 2:30pm on 20th May.

Thu, May 19 AM  Opening Address
Chair: Minoru Watanabe (Shizuoka University)
09:00 - 09:05
  - Greeting from Chair of Technical Committee on Reconfigurable Systems
Thu, May 19 AM  Invited Talk (1)
Chair: Minoru Watanabe (Shizuoka University)
09:05 - 09:50
(1) 09:05-09:50 [Invited Talk]
FPGA-based Acceleration of Image Retrieval and its Application to a Document Search System
Hidetoshi Matsumura, Masahiko Sugimura, Hironobu Yamasaki, Yasumoto Tomita, Takayuki Baba, Yasuhiro Watanabe (Fujitsu Labs)
  09:50-10:05 Break ( 15 min. )
Thu, May 19 AM  HLS and Performance Assessment (1)
Chair: Takefumi Miyoshi (eTrees, Japan)
10:05 - 11:05
(2) 10:05-10:25 Succinct-Data-Structure Based on Block-Size-Constrained Compression for a Text-Search Accelerator Masanori Hariyama, Hasitha Muthumala Waidyasooriya (Tohoku Univ.)
(3) 10:25-10:45 Design of an FPGA Platform for Stencil Computation Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.)
(4) 10:45-11:05 Design of an FPGA-based Accelerator for Moleculer Dynamics Using OpenCL Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Kota Kasahara (Osaka Univ.)
Thu, May 19 AM  Lunch Break
Chair: Yutaka Tamiya (Fujitsu Labs.) / Yoshiki Yamaguchi (Univ. of Tsukuba)
11:05 - 13:00
  - Guided tour
・A guided tour is planned and the departure time will be 11:15.
・It will accept only the first 30 people.
・The tour participants will see Fujitsu's computers and technologies
for example K computer and FACOM 138A.
Thu, May 19 PM  Image Processing
Chair: Kazuya Tanikagawa (Hiroshima City Univ.)
13:00 - 14:00
(5) 13:00-13:20 FPGA Implementation of a Super-Resolution System Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
(6) 13:20-13:40 * Chengzhe Li, Lai Yoong Yee, Yoshiki Yamaguchi (Univ. Tsukuba)
(7) 13:40-14:00 * Kota Ando, Kentaro Orimo, Kodai Ueyoshi, Tetsuya Asai, Masato Motomura (Hokkaido Univ.)
  14:00-14:15 Break ( 15 min. )
Thu, May 19 PM  Parallel and Distributed Computing using FPGAs
Chair: Yutaka Yamada (Toshiba)
14:15 - 15:15
(8) 14:15-14:35 Efficiency Execution of Split Circuit in a Scalable Hardware System by Signal Compression Yoshio Murata, Hironari Yoshiuchi, Hironori Nakajo (TUAT)
(9) 14:35-14:55 Sustained Memory Bandwidth and Computing Performance of FPGA-based Parallel Computation for Fluid Simulation Daichi Tanaka, Sano Kentaro, Satoru Yamamoto (Tohoku Univ.)
(10) 14:55-15:15 * Kasha Yamamoto, Tetsuya Asai, Masato Motomura (Hokkaido Univ.)
Thu, May 19 PM  Introduction of FPGA Design Competition
Chair: Yoshiki Yamaguchi (University of Tsukuba)
15:15 - 15:55
(11) 15:15-15:55 Introduction to 2016 FPGA Trax contest Yasunori Osana (Ryukyus Univ.), Tomonori Izumi (Ritsumeikan Univ.)
Thu, May 19 PM  FPGA Applications, etc (1)
Chair: Yukinori Sato (Tokyo Tech.)
15:55 - 17:15
(12) 15:55-16:15 A large-scale SIMD architecture
-- preliminary performance estimation by an FPGA --
Takahiro Ito, Yoshiki Yamaguchi, Taisuke Boku (Univ. Tsukuba), Mitsuhisa Sato (RIKEN AICS), Yuetsu Kodama, Jinpil Lee (RIKEN), Junji Yamamoto, Yaoko Nakagawa (Hitachi)
(13) 16:15-16:35 Checkpointing and Live-Migration on FPGA-based Supercomputing Shinya Takamaeda, Vu Hoang Gia, Supasit Kajkamhaeng (NAIST)
(14) 16:35-16:55 Optically reconfigurable gate arrary with an optical input Hiroki Shinba, Shinya Furukawa (Shizuoka Univ.), Ili Shairah Abdul Halim (MJIIT), Minoru Watanabe (Shizuoka Univ.), Fuminori Kobayashi (MJIIT)
(15) 16:55-17:15 Fine-grained body bias control to minimize leakage current of CGRA Hayate Okuhara, Johannes Maximilian Kuehn, Akram Ben Ahmed, Hideharu Amano (Keio Univ.)
  17:15-17:30 Break ( 15 min. )
Thu, May 19 PM  Special Lecture
Chair: Masato Motomura (Hokkaido University)
17:30 - 18:15
(16) 17:30-18:15 [Invited Talk]
Overviews on key technologies to substantialize 'IoT society'
Toshihiro Matsui, Hisashi Sekine, Hideki Hayashi, Hiroaki Ohkubo, Hirotaka Sunaguchi, Naoyuki Matsuo, Yoshitatsu Sato (NEDO TSC)
Thu, May 19 PM  Social Hour
18:30 - 20:30
  - Place: Lounge C on 20th floor in Fujitsu Kawasaki Main Office
Address: 4-1-1 Kamikodanaka Nakahara-Ward, Kawasaki, Kanagawa, 211-8588, Japan
URL: http://www.fujitsu.com/global/about/corporate/locations/worldlocation/japan/
Fri, May 20 AM  Invited Talk (2)
Chair: Yoshiki Yamaguchi (University of Tsukuba)
09:00 - 09:50
(17) 09:00-09:50 [Invited Talk]
Altera OpenCL SDK with Spectra-Q, the latest technology trend and the applications Spectra-Q: The latest technology and applications, including OpenCL SDK
Yukitaka Takemura (Altera JP)
  09:50-10:05 Break ( 15 min. )
Fri, May 20 AM  FPGA Applications, etc (2)
Chair: Tomonori Izumi (Ritsumeikan University)
10:05 - 11:05
(18) 10:05-10:25 * Kentaro Orimo, Kota Ando, Kodai Ueyoshi, Tetsuya Asai, Masato Motomura (Hokkaido Univ.)
(19) 10:25-10:45 A Dynamic Memory Selection Strategy for Key-Value Store Appliances with DRAMs and SSDs Hiroaki Komatsu, Hiroki Matsutani (Keio Univ.)
(20) 10:45-11:05 A Sound Field Visualizer with Java-based High Level Synthesis Tool and CoRAM Architecture Synthesis Framework Daichi Teruya, Daichi Miyazaki, Hironori Nakajo (TUAT)
  11:05-11:20 Break ( 15 min. )
Fri, May 20 AM  HLS and Performance Assessment (2)
Chair: Takaaki Miyajima (JAXA)
11:20 - 12:20
(21) 11:20-11:40 Evaluation of an OpenCL-Based FPGA Accelerator for Phase-Only Correlation Masanori Hariyama, Shunsuke Tatsumi, Koichi Ito, Takafumi Aoki (Tohoku Univ.)
(22) 11:40-12:00 Evaluation of an OpenCL-Based FPGA Platform for Particle Filter Masanori Hariyama, Shunsuke Tatsumi (Tohoku Univ.), Norikazu Ikoma (Nippon Institute of Technology)
(23) 12:00-12:20 * Ebisuhama Yoshiki, Tanigawa Kazuya, Hironaka Tetsuo (Hiroshima City Univ.)
Fri, May 20 PM  Closing remarks
12:20 - 12:30
  - Closing remarks
Fri, May 20 PM  Technical Committee on RECONF
13:00 - 14:30
  - Place: Kawasaki City General Welfare Center
Address: 6-22-5 Kamikodanaka, Nakahara-Ward, Kawasaki, Kanagawa, 211-0053, Japan
Note: one minute walking distance from JR Musashi-Nakahara Station
Map: http://travel.mapfan.com/lang/en/spot/90774

Announcement for Speakers
General TalkEach speech will have 17 minutes for presentation and 3 minutes for discussion.

Contact Address and Latest Schedule Information
RECONF Technical Committee on Reconfigurable Systems (RECONF)   [Latest Schedule]
Contact Address Inquiries for RECONF
Minoru Watanabe (Shizuoka University)
tmnipc
Inquiries for the Meeting in May 2016
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Last modified: 2016-05-12 17:46:54


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