| IEICE Technical Committee Submission System Advance Program |
Online Proceedings [Sign in] Tech. Rep. Archives |
| Go Top | Go Back | Prev CPSY Conf / Next CPSY Conf | [HTML] / [HTML(simple)] / [TEXT] | [Japanese] / [English] |
|
=============================================== Technical Committee on Computer Systems (CPSY) Chair: Tsutomu Yoshinaga (Univ. of Electro-Comm.) Vice Chair: Akira Asato (Fujitsu), Yasuhiko Nakajima (NAIST) Secretary: Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Electro-Comm.) Assistant: Hiroaki Inoue (NEC), Takeshi Ohkawa (Utsunomiya Univ.) DATE: Fri, Oct 10, 2014 10:30 - 14:40 PLACE: International Convention Complex(2-1, Nakase, Mihama-ku, Chiba-city, Japan. a five minute walk from Kaihin-makuhari station. http://www.m-messe.co.jp/en/access/index.html. Hidetsugu IRIE, Graduate School of Information Systems. +81-42-443-5635) TOPICS: Computer Systems for User-centric Application ---------------------------------------- Fri, Oct 10 AM User-centric Computing, and Security (10:30 - 11:45) Chair: Kanemitsu OOTSU ---------------------------------------- (1) 10:30 - 10:55 A preliminary study of driver assistance using relative checkpoints Kenji Domon, Masato Yoshimi, Hidetsugu Irie, Tsutomu Yoshinaga (UEC) (2) 10:55 - 11:20 UI improvements by a cursor prediction drawing in AirTarget System Takafumi Nakajima, Kohei Chikama, Hiroshi Iwasaki, Masato Yoshimi, Hidetsugu Irie, Tsutomu Yoshinaga (UEC) (3) 11:20 - 11:45 Verification of a comprehensive injection attack detection with dynamic information tracking Hidenori Tsuji, Fumihiko Takayama, Wataru Kitada (IIT), Ryota Shioya (Nagoya Univ.), Masahiro Goshima (NII) ---------------------------------------- Fri, Oct 10 PM Emerging Devices and Architectures (13:00 - 14:40) Chair: Hidetsugu IRIE ---------------------------------------- (4) 13:00 - 13:25 Power optimization of micro-controller with Sillicon on Thin Buried Oxide Kuniaki Kitamori, Hideharu Amano (Keio Univ.) (5) 13:25 - 13:50 Theoretical Write Amplification Analysis of the SSD Shin-ichi Kanno, Hiroshi Yao (TOSHIBA), Daisuke Hashimoto (TAEC) (6) 13:50 - 14:15 An Evaluation of Stencil Computation using Flash Storage with Asynchronous Block Device I/O Hideyuki Tan, Hiroko Midorikawa (Seikei Univ./JST) (7) 14:15 - 14:40 Study of Processor Core for Many-core Architecture Combining ALU Cascading and 3-way In-order Execution Hajime Shimada (Nagoya Univ.), Ryotaro Kobayashi (Toyohashi Univ. of Tech.) # Information for speakers General Talk will have 20 minutes for presentation and 5 minutes for discussion. === Technical Committee on Computer Systems (CPSY) === # FUTURE SCHEDULE: Thu, Nov 13, 2014 - Fri, Nov 14, 2014: Hiroshima University [Fri, Sep 19], Topics: Cloud Computing, etc. Wed, Nov 26, 2014 - Fri, Nov 28, 2014: B-ConPlaza [Sun, Sep 7], Topics: Design Gaia 2014 -New Field of VLSI Design- Mon, Dec 1, 2014 - Tue, Dec 2, 2014: Kikai-Shinko-Kaikan Bldg. [Fri, Oct 10] Thu, Jan 29, 2015 - Fri, Jan 30, 2015: Hiyoshi Campus, Keio University [Fri, Nov 14], Topics: FPGA Applications, etc # SECRETARY: Hidetsugu IRIE（the University of Electro-communications） TEL +81-42-443-5635, FAX +81-42-443-5681 E-mail: i  e is  c Last modified: 2014-09-12 12:17:26 |
Notification: Mail addresses are partially hidden against SPAM.
[Download Paper's Information (in Japanese)] <-- Press download button after click here.
[Cover and Index of IEICE Technical Report by Issue]
[Presentation and Participation FAQ] (in Japanese)
[Return to CPSY Schedule Page] /
| Go Top | Go Back | Prev CPSY Conf / Next CPSY Conf | [HTML] / [HTML(simple)] / [TEXT] | [Japanese] / [English] |
[Return to Top Page]