| Conference Date |
Thu, Nov 8, 2018 09:20 - 16:40
Fri, Nov 9, 2018 09:20 - 16:45 |
| Topics |
Process, Device, Circuit simulation, etc. |
| Conference Place |
The Kikai Shinko Kaikan building |
| Address |
3-5-8, Shibakoen, Minato-ku, Tokyo 105-0011, Japan |
| Transportation Guide |
6-minute walk from Kamiyacho Station, Tokyo Metro Hibiya Line or 15-minute walk from Hamamatsucho Station, JR line |
| Sponsors |
This conference is co-sponsored by The Japan Society of Applied Physics.
|
| Registration Fee |
This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on SDM. |
Thu, Nov 8 AM
Chair: T. Noda
09:20 - 12:20 |
| (1) |
09:20-10:20 |
[Invited Talk]
SISPAD 2018 Review |
Kenichiro Sonoda (Renesas Electronics) |
| (2) |
10:20-11:20 |
[Invited Talk]
Development and Education of Electron Devices assisted with Computer Simulation |
Ken Uchida (Univ. of Tokyo), Takahisa Tanaka (Keio Univ.) |
| (3) |
11:20-12:20 |
[Invited Talk]
Proposal and device design of tunneling field effect transistor with oxide semiconductor and group-IV semiconductor |
Kimihiko Kato, Hiroaki Matsui, Hitoshi Tabata, Mitsuru Takenaka, Shinichi Takagi (Univ. Tokyo) |
| |
12:20-13:30 |
Lunch Break ( 70 min. ) |
Thu, Nov 8 PM
Chair: H. Takashino
13:30 - 15:30 |
| (4) |
13:30-14:30 |
[Invited Talk]
Device Simulation of Reliability for Advanced Semiconductor Devices |
Takamitsu Ishihara, Kazuya Matsuzawa, Takeshi Naito, Sadayuki Yoshitomi (TMC) |
| (5) |
14:30-15:30 |
[Invited Talk]
Development of the evaluation method of the strength of polycrystalline materials based on the order of atom arrangement and its application to the strength evaluation of electroplated copper thin films |
Ken Suzuki, Yifan Luo, Hideo Miura (Tohoku Univ.) |
| |
15:30-15:40 |
Break ( 10 min. ) |
Thu, Nov 8 PM
Chair: S. Souma
15:40 - 16:40 |
| (6) |
15:40-16:40 |
[Invited Talk]
High Resolution CMOS Ion Image Sensors and Its Application for Biomedical Fields |
Kazuaki Sawada, YouNa Lee, Yasuyuki Kimura, Tatsuya Iwata, Kazuhiro Takahashi, Toshiaki Hattori (Toyohashi Tech.) |
Fri, Nov 9 AM
Chair: Y. Kamakura
09:20 - 12:20 |
| (7) |
09:20-10:20 |
[Invited Talk]
Topography Simulation of Trench-Filling Growth of 4H-SiC |
Kazuhiro Mochizuki, Shiyang Ji, Ryoji Kosugi, Yoshiyuki Yonezawa, Hajime Okumura (AIST) |
| (8) |
10:20-11:20 |
[Invited Talk]
Modeling of Electron Transport in 4H-SiC MOS Inversion Layers |
Hajime Tanaka, Nobuya Mori (Osaka Univ.) |
| (9) |
11:20-12:20 |
[Invited Talk]
Analysis of Charge Transport in Amorphous Organic Thin Films |
Hironori Kaji (Kyoto Univ.) |
| |
12:20-13:20 |
Lunch Break ( 60 min. ) |
Fri, Nov 9 PM
Chair: H. Ansai
13:20 - 15:20 |
| (10) |
13:20-14:20 |
[Invited Talk]
Review of Recent Sensor Devices Research based on Semiconductor Technologies
-- With Review of SISPAD 2017 Workshop2: "Technologies for Sensor Devices" -- |
Shigeyasu Uno (Ritsumeikan Univ.) |
| (11) |
14:20-15:20 |
[Invited Talk]
Device Simulation of Field-Effect Transistor Using Ferroelectric Negative Capacitance |
Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Hiroyuki Ota, Shinji Migita, Hidehiro Asai (AIST) |
| |
15:20-15:30 |
Break ( 10 min. ) |
Fri, Nov 9 PM
Chair: T. Kunikiyo
15:30 - 16:45 |
| (12) |
15:30-15:55 |
Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory. |
Fumiya Suzuki, Sigeyoshi Watanabe (Shonan Inst. of Tech) |
| (13) |
15:55-16:35 |
[Invited Talk]
Characteristics and Ultralow Voltage Rectification Experiment on MOS Diode connection using Super Steep SS PN-Body Tied SOI-FET |
Shun Momose, Jiro Ida, Takuya Yamada, Takayuki Mori, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) |
| |
16:35-16:45 |
Awards ceremony ( 10 min. ) |
：noda.taiji[atmark]jp.panasonic.com