| IEICE Technical Committee Submission System Advance Program |
Online Proceedings [Sign in] Tech. Rep. Archives |
| Go Top | Go Back | Prev CPSY Conf / Next CPSY Conf | [HTML] / [HTML(simple)] / [TEXT] | [Japanese] / [English] |
|
=============================================== Technical Committee on Computer Systems (CPSY) Chair: Takanobu Baba Vice Chair: Nobuki Kajihara, Toshinori Sueyoshi Secretary: Hiroko Midorikawa, Akira Asato Assistant: Takashi Yokota DATE: Fri, Dec 16, 2005 12:30 - 17:35 PLACE: Academia Hall, Yoto Campus, Utsunomiya University(7-1-2 Yoto, Utsunomiya-shi, Tochigi, 321-8585 Japan.Bus from JR (or Tobu) Utsunomiya Station. http://www.utsunomiya-u.ac.jp. Prof. Takashi Yokota. 028-689-6290) TOPICS: Autonomous and cooperative systems, etc. ---------------------------------------- Fri, Dec 16 PM dynamic optimization in autonomous/parallel/distributed systems (12:30 - 14:00) ---------------------------------------- (1) 12:30 - 12:55 Disk Access Pattern Analysis for Self-defragmentation Method of File Servers based on IP Storage Yoshiko Yasuda, Shinichi Kawamoto (Hitachi Ltd.) (2) 12:55 - 13:20 Energy-Efficient Cluster Interconnects with Managed Switch Yoshiro Ikeda, Akihiro Yasuo, Atsushi Mori, Katsuhiko Nishikawa, Akira Asato (FUJITSU) (3) 13:20 - 13:45 Design of run-time support system for binary level multithreading Kanemitsu Ootsu, Toru Iba, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) ----- Break ( 15 min. ) ----- ---------------------------------------- Fri, Dec 16 processor architecture and parallel systems (14:00 - 15:55) ---------------------------------------- (4) 14:00 - 14:25 Exploiting Typical Delays to Boost Instruction Collapsing Toshinori Sato, Akihiro Chiyonobu (KIT) (5) 14:25 - 14:50 A Consideration and Evaluation of Thread Partitioning Method based on Program Structures Daisuke Mitsugi, Takahiko Kobayashi, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) (6) 14:50 - 15:15 A multithread code optimization method that considered interthread communication Noritoshi Akutsu, Hideki Masuzawa, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) (7) 15:15 - 15:40 An Extendable Simulation Environment for Chip-Multi VLIW Architecture Design Fumihito Furukawa (Teikyo Univ.), Takayuki Aoki, Daisuke Oka, Atsushi Tsukikawa, Kanemitsu Ootsu, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) ----- Break ( 15 min. ) ----- ---------------------------------------- Fri, Dec 16 autonomous and cooperative systems (15:55 - 17:35) ---------------------------------------- (8) 15:55 - 16:20 Improving server-addition response time by slow-start mechanism in a workload-management system Mineyoshi Masuda, Toshiaki Tarui, Toru Shonai (Hitachi), Mamoru Sugie (Housei Univ.) (9) 16:20 - 16:45 Failover Method based on Exclusive System Reset for Cluster System Tsunehiko Baba, Ryosuke Tsurumi (Hitachi, Ltd.) (10) 16:45 - 17:10 An autonomic operation method based on encapsulated knowledge of operation Teruyoshi Zenmyo, Hideki Yoshida, Tetsuro Kimura (Toshiba) (11) 17:10 - 17:35 * Yoshikazu Sato, Yasuhisa Gotoh (IBM) === Technical Committee on Computer Systems (CPSY) === # FUTURE SCHEDULE: Tue, Jan 17, 2006 - Wed, Jan 18, 2006: [Tue, Nov 15], Topics: FPGA and its Application, etc. # SECRETARY: Takashi Yokota (Utsunomiya Univ.) TEL +81-28-689-6290, FAX +81=28-689-6290 E-mail:     is u    -u Last modified: 2005-11-30 16:11:32 |
Notification: Mail addresses are partially hidden against SPAM.
[Download Paper's Information (in Japanese)] <-- Press download button after click here.
[Cover and Index of IEICE Technical Report by Issue]
[Presentation and Participation FAQ] (in Japanese)
[Return to CPSY Schedule Page] /
| Go Top | Go Back | Prev CPSY Conf / Next CPSY Conf | [HTML] / [HTML(simple)] / [TEXT] | [Japanese] / [English] |
[Return to Top Page]