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Technical Committee on Computer Systems (CPSY)
Chair: Toshinori Sueyoshi (Kumamoto Univ.) Vice Chair: Syuuichi Sakai (Univ. of Tokyo), Yoshio Miki (Hitachi)
Secretary: Morihiro Kuga (Kumamoto Univ.), Akira Asato (Fujitsu Labs.)
Assistant: Hidetsugu Irie (Univ. of Tokyo)

DATE:
Thu, Dec 18, 2008 09:20 - 16:40

PLACE:
(075-322-7800)

TOPICS:
Network Storage Systems, etc.

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Thu, Dec 18 AM (09:20 - 10:20)
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(1) 09:20 - 09:50
A Control System on Response Time of a Security Realization Method using a General Purpose OS on a Multi-Hop Wireless Network
Mihoko Uno, Masato Oguchi (Ocha Univ.)

(2) 09:50 - 10:20
Extraction of Characteristics of Anomaly Accessed IP Packets using Chi-square Method
Shunsuke Oshima (Yatsushiro National College of Tech.), Nakashima Takuo (Tokai Univ.), Toshinori Sueyoshi (Kumamoto Univ.)

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Thu, Dec 18 AM (10:30 - 12:00)
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(3) 10:30 - 11:00
A Task Clustering Minimizing Worst Response Time in Distributed Processing Environment
Hidehiro Kanemitsu, Yi Lu, Yoshihiro Otani, Gilhyo Lee, Hidenori Nakazato, Takashige Hoshiai, Yoshiyori Urano (Waseda Univ.)

(4) 11:00 - 11:30
Analyzing characteristics of PC cluster consolidated with IP-SAN in the execution of data-intensive applications
Asuka Hara (Ochanomizu Univ.), Kikuko Kamiasaka (NICT), Saneyasu Yamaguchi (Kogakuin Univ.), Masato Oguchi (Ochanomizu Univ.)

(5) 11:30 - 12:00
The Dynamic Memory Management for Distributed Large Memory System DLM
Kazuhiro Saito, Hiroko Midorikawa, Munenori Kai (Seikei Univ.)

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Thu, Dec 18 PM (13:15 - 14:15)
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(6) 13:15 - 14:15
[Special Invited Talk]
An Introduction of Our Recent Research on VLIW from 3way to 9Nway
Yasuhiko Nakashima (NAIST)

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Thu, Dec 18 PM (14:30 - 15:30)
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(7) 14:30 - 15:00
Evaluation of iSCSI remote storage access in long latency with analysis of congestion window and packets
Reika Higa (Ocha Univ), Kosuke Matsubara, Takao Okamawari (SOFTBANK MOBILE), Saneyasu Yamaguchi (Kogakuin), Masato Oguchi (Ocha Univ)

(8) 15:00 - 15:30
Network cache system with the autonomic recovery mechanism for wide-area SAN
Takahiro Miyamoto, Michiaki Hayashi, Hideaki Tanaka (KDDI Labs)

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Thu, Dec 18 PM (15:40 - 16:40)
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(9) 15:40 - 16:10
A Reconfigurable Processor for Genetic Algorithm based on Redundant Binary Number
Masanao Aoshima, Akinori Kanasugi (Tokyo Denki Univ.)

(10) 16:10 - 16:40
An Architecture of Dynamically Reconfigurable Systolic Array and FPGA Implementation
Toshiyuki Ishimura, Yuhki Hayakawa, Akinori Kanasugi (Tokyo Denki Univ.)



=== Technical Committee on Computer Systems (CPSY) ===
# FUTURE SCHEDULE:

Thu, Jan 29, 2009 - Fri, Jan 30, 2009: [Fri, Nov 7]
Thu, Mar 5, 2009 - Fri, Mar 6, 2009: Sado Island Integrated Development Center [Tue, Jan 20], Topics: ETNET2009

# SECRETARY:
Morihiro KUGA (Kumamoto Univ.)
TEL +81-96-342-3647, FAX +81-96-342-3599
E-mail: am-u


Last modified: 2008-11-03 20:30:26


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