Fri, Mar 6 PM FPGA
13:00 - 14:40 |
(1)
CPSY |
13:00-13:25 |
A Case for Accelerating Data Structure Sever using FPGA NIC |
Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) |
(2)
CPSY |
13:25-13:50 |
Implementation evaluation of in-vehicle encrypted CAN communication and replay attack countermeasure technique |
Masashi Nakano, Takaya Kubota, Mitsuru Shiozaki, Takeshi Fujino (Ritsumeikan Univ.) |
(3)
CPSY |
13:50-14:15 |
A HW/SW Cooperative System Design of Stabilization Processing of Images from Networked Cameras for the Realization of an Automatic Watch System for Safe Navigation |
Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Manabu Inagawa (IDi), Daichi Uetake, Mayu Fusegi, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) |
(4)
CPSY |
14:15-14:40 |
Advice : An application design environment for various parallel processing hardware |
Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ.) |
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14:40-14:50 |
Break ( 10 min. ) |
Fri, Mar 6 PM Processors
14:50 - 16:30 |
(5)
CPSY |
14:50-15:15 |
A Resource Utilization Aware Method to Improve Throughput on RMT Processor |
Taro Murata, Kensuke Kaneda, Masayoshi Takasu, Keigo Mizotani, Yusuke Hatori, Nobuyuki Yamasaki (Keio Univ.) |
(6)
CPSY |
15:15-15:40 |
Adaptive Error Correcting Code by Priority on RMT Processor |
Tsukasa Matsui, Shuma Hagiwara, Keigo Mizotani, Nobuyuki Yamasaki (Keio Univ.) |
(7)
CPSY |
15:40-16:05 |
Development of soft macro processor for embedded system |
Tomoyuki Sugiyama, Takahiro Sasaki, Toshio Kondo (Mie Univ.) |
(8)
CPSY |
16:05-16:30 |
A proposal of placement optimization algorithm by introducing TSV module |
Atsushi Murata, Tomohiro Inaba, Masato Yoshimi, Hidetsugu Irie, Tsutomu Yoshinaga (UEC) |
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16:30-16:40 |
Break ( 10 min. ) |
Fri, Mar 6 PM Software
16:40 - 18:20 |
(9)
CPSY |
16:40-17:05 |
An Algorithm to Reduce Components of a Gaussian Mixture Model Considering Distribution Shape of Each Component |
Naoya Yokoyama, Shuji Tsukiyama (Chuo Univ.), Masahiro Fukui (Ritsumeikan Univ.) |
(10)
CPSY |
17:05-17:30 |
Development of Introductory Learning Material for Embedded Systems using Plarail |
Takashi Kawanami, Shunpei Kaji, Daisuke Takago, Ryoko Hayashi (KIT) |
(11)
CPSY |
17:30-17:55 |
A Trial Investigation System for Vulnerability on M2M Network |
Kiyotaka Atsumi (ka-lab) |
(12)
CPSY |
17:55-18:20 |
Prevention Peeping System by coordinating LED Light with Smartphones |
Kouhei Sugiyama, Kyosuke Kageyama, Takeshi Kumaki, Takeshi Fujino (Ritsumei Univ.) |
Sat, Mar 7 AM Power Saving 1
08:30 - 10:10 |
(13)
CPSY |
08:30-08:55 |
Power optimization of low-power reconfigurable accelerator CMA-SOTB |
Yu Fujita, Hayate Okuhara, Koichiro Masuyama, Hideharu Amano (Keio Univ.) |
(14)
CPSY |
08:55-09:20 |
Improvements and evaluation of bias circuit control for CMOS analog circuit |
Ryohei Hori (Ritsumeikan Univ.), Toshio Kumamoto (OSU), Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.) |
(15)
CPSY |
09:20-09:45 |
A Study on a Power Efficient Neurochip with Non-Volatile Memory |
Jun Tomii, Masaaki Kondo, Hiroshi Nakamura (Univ. Tokyo) |
(16)
CPSY |
09:45-10:10 |
Energy Reduction of BTB by focusing on Number of Branches per Cache Line |
Hiroki Yamamoto, Ryotaro Kobayashi (TUT), Hajime Shimada (NU) |
| |
10:10-10:20 |
Break ( 10 min. ) |
Sat, Mar 7 AM Power Saving 2
10:20 - 12:00 |
(17)
CPSY |
10:20-10:45 |
Dynamic Scheduling Algorithm for Automatically Parallelized and Power Reduced Applications on Multicore Systems |
Takashi Goto, Kohei Muto, Tomohiro Hirano, Hiroki Mikami (Waseda Univ.), Uichiro Takahashi, Sakae Inoue (Fujitsu), Keiji Kimura, Hironori Kasahara (Waseda Univ.) |
(18)
CPSY |
10:45-11:10 |
Real-Time Static Voltage and Frequency Scaling on RMT Processor with Instructions Per Clock Cycle Control |
Kenji Yamada, Yusuke Hatori, Shuma Hagiwara, Keigo Mizotani, Masayoshi Takasu, Nobuyuki Yamasaki (Keio Univ.) |
| (19) |
11:10-11:35 |
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| (20) |
11:35-12:00 |
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12:00-13:00 |
Lunch Break ( 60 min. ) |
Sat, Mar 7 PM
13:00 - 14:40 |
(21)
DC |
13:00-13:25 |
Study of Cost Reduction Technique for FPGA-based Control Systems by Quantitative Evaluation of Dangerous Failure Ratio |
Teppei Hirotsu, Tadanobu Toba (Hitachi) |
(22)
DC |
13:25-13:50 |
Design and Evaluation of a Floating-point Multiplier with Online Error Detection by Partial Duplication |
Nobutaka Kito (Chukyo Univ.), Kazushi Akimoto, Naofumi Takagi (Kyoto Univ.) |
(23)
DC |
13:50-14:15 |
File access analysis method by hardware monitoring of disk I/O |
Kenji Toda, Kazukuni Kobara (AIST) |
(24)
DC |
14:15-14:40 |
Speed Up co-Simulation for Verification of Embedded Systems |
Hiroaki Nakata, Kenta Morishima, Yasuo Sugure (Hitachi) |
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14:40-14:50 |
Break ( 10 min. ) |
Sat, Mar 7 PM
14:50 - 16:30 |
| (25) |
14:50-15:15 |
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| (26) |
15:15-15:40 |
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| (27) |
15:40-16:05 |
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| (28) |
16:05-16:30 |
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Fri, Mar 6 PM
13:00 - 14:40 |
| (29) |
13:00-13:25 |
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| (30) |
13:25-13:50 |
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| (31) |
13:50-14:15 |
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| (32) |
14:15-14:40 |
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14:40-14:50 |
Break ( 10 min. ) |
Fri, Mar 6 PM
14:50 - 16:30 |
| (33) |
14:50-15:15 |
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| (34) |
15:15-15:40 |
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| (35) |
15:40-16:05 |
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| (36) |
16:05-16:30 |
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16:30-16:40 |
Break ( 10 min. ) |
Fri, Mar 6 PM
16:40 - 18:20 |
| (37) |
16:40-17:05 |
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| (38) |
17:05-17:30 |
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| (39) |
17:30-17:55 |
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| (40) |
17:55-18:20 |
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Sat, Mar 7 AM
08:30 - 10:10 |
| (41) |
08:30-08:55 |
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| (42) |
08:55-09:20 |
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| (43) |
09:20-09:45 |
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| (44) |
09:45-10:10 |
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10:10-10:20 |
Break ( 10 min. ) |
Sat, Mar 7 AM
10:20 - 12:00 |
| (45) |
10:20-10:45 |
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| (46) |
10:45-11:10 |
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| (47) |
11:10-11:35 |
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| (48) |
11:35-12:00 |
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12:00-13:00 |
Lunch Break ( 60 min. ) |
Sat, Mar 7 PM
13:00 - 14:40 |
| (49) |
13:00-13:25 |
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| (50) |
13:25-13:50 |
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| (51) |
13:50-14:15 |
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| (52) |
14:15-14:40 |
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14:40-14:50 |
Break ( 10 min. ) |
Sat, Mar 7 PM
14:50 - 16:30 |
| (53) |
14:50-15:15 |
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| (54) |
15:15-15:40 |
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| (55) |
15:40-16:05 |
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| (56) |
16:05-16:30 |
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