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Chair |
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Hideto Hidaka (Renesas) |
Vice Chair |
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Makoto Nagata (Kobe Univ.) |
Secretary |
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Takashi Hashimoto (Panasonic), Masanori Natsui (Tohoku Univ.) |
Assistant |
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Hiroyuki Ito (Tokyo Inst. of Tech.), Masatoshi Tsuge (Socionext), Tetsuya Hirose (Kobe Univ.) |
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Chair |
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Tsutomu Matsumoto (Yokohama National Univ.) |
Vice Chair |
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Shinichi Kawamura (Toshiba), Makoto Ikeda (Univ. of Tokyo) |
Secretary |
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Noriyuki Miura (Kobe Univ.), Hiroki Kunii (SECOM) |
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Conference Date |
Mon, Oct 29, 2018 13:00 - 17:15 |
Topics |
HardwareSecurity, etc. |
Conference Place |
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Sponsors |
This conference is co-sponsored by IEEE SSCS Japan Chapter, IEEE SSCS Kansai Chapter, Kobe University Gratuate School of Science, Technology, and Innovation.
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Registration Fee |
This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on HWS, ICD. |
Mon, Oct 29 PM 13:00 - 14:15 |
(1) |
13:00-13:25 |
Study on Signal-to-Noise Ratio Simulation of Side-Channel Traces Leaked from AES Circuit using EDA tool |
Toshiaki Teshima, Yusuke Yano, Kengo Iokibe, Yoshitaka Toyota (Okayama Univ.) |
(2) |
13:25-13:50 |
Countermeasures for power noise and side-channel leakage in crypto fmodules (I) |
Kazuki Monta, Sousuke Sato, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) |
(3) |
13:50-14:15 |
Hardware Design of High Precision Discrete Gaussian Sampler for Lattice-based Cryptography |
Keitaro Koga (UTokyo), Awano Hiromitsu (VDEC), Ikeda Makoto (UTokyo) |
Mon, Oct 29 PM 14:30 - 15:45 |
(4) |
14:30-14:55 |
An Acceleration of Compressed Squaring for Pairing Implementation with Pipeline Modular Multiplier |
Yota Okuaki, Junichi Sakamoto, Naoki Yoshida, Daisuke Fujimoto, Tsutomu Matsumoto (YNU) |
(5) |
14:55-15:20 |
Selection and evaluation of optimal bases in the case of implementing Q-RNS MR algorithm in FPGA |
Yoshihiro Kori, Daisuke Fujimoto, Yu-ichi Hayasi (NAIST), Naofumi Homma (Tohoku Univ.) |
(6) |
15:20-15:45 |
A Design and Implementation of Ring-LWE Cryptography Hardware Based on Number Theoretic Transform |
Sora Endo, Rei Ueno, Takafumi Aoki, Naofumi Homma (Tohoku Univ.) |
Mon, Oct 29 PM 16:00 - 17:15 |
(7) |
16:00-16:25 |
Evaluation of Availability on Cache Leakage from OSS-RSA |
Hayato Mori, Rei Ueno (Tohoku Univ.), Junko Takahashi (NTT), Yuichi Hayashi (naist), Naohumi Honma (Tohoku Univ.) |
(8) |
16:25-16:50 |
Impact of Instruction Replacing Laser Fault Attack on Implementation of Pairing Computation on ARM Processor |
Junichi Sakamoto, Tsutomu Matsumoto (YNU) |
(9) |
16:50-17:15 |
Security Evaluations of Automotive Attacks on FlexRay |
Junko Takahashi, Masashi Tanaka (NTT) |
Announcement for Speakers |
General Talk | Each speech will have 20 minutes for presentation and 5 minutes for discussion. |
Contact Address and Latest Schedule Information |
ICD |
Technical Committee on Integrated Circuits and Devices (ICD) [Latest Schedule]
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Contact Address |
Takashi Hashimoto (Panasonic Corporation)
E-: 1967pac |
HWS |
Technical Committee on Hardware Security (HWS) [Latest Schedule]
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Contact Address |
Noriyuki Miura(Kobe University), Hiroki Kunii(SECOM)
E-:hws-c |
Last modified: 2018-10-18 11:43:29
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