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Technical Committee on Dependable Computing (DC)
Chair: Seiji Kajihara (Kyushu Inst. of Tech.) Vice Chair: Nobuyasu Kanekawa (Hitachi)
Secretary: Tomohiro Nakamura (Hitachi), Tatsuhiro Tsuthiya (Osaka Univ.)
DATE:
Mon, Feb 10, 2014 09:00 - 17:30
PLACE:
TOPICS:
VLSI Design and Test, etc.
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Mon, Feb 10 AM (09:00 - 10:15)
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(1) 09:00 - 09:25
Module Coupling Overhead Aware Scan Chain Construction
Meguru Komatsu, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
(2) 09:25 - 09:50
On Feasibility of Delay Detection by Time-to-Digital Converter Embedded in Boundary-Scan
Hiroki Sakurai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima)
(3) 09:50 - 10:15
A DFT Method to Achieve 100% Fault Coverage for QDI Asynchronous Circuit
Sanae Mizutani, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
----- Break ( 15 min. ) -----
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Mon, Feb 10 AM (10:30 - 11:20)
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(4) 10:30 - 10:55
Suitable Power-Aware Test Pattern Ordering for Deterministic Circular Self Test Path
Ryo Ogawa, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
(5) 10:55 - 11:20
A Low Power Dissipation Oriented Don't Care Filling Method Using SAT
Yoshiyasu Takahashi, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ)
----- Break ( 15 min. ) -----
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Mon, Feb 10 AM (11:35 - 12:50)
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(6) 11:35 - 12:00
Note on Weighted Fault Coverage Considering Multiple Defect Sizes and Via Open
Yuta Nakayama (Tokyo Metro. Univ.), Masayuki Arai (Nihon Univ.), Hongbo Shi, Kazuhiko Iwasaki (Tokyo Metro. Univ.)
(7) 12:00 - 12:25
Device-parameter Estimation Using Framework of Fmax Testing
Michihiro Shintani, Takashi Sato (Kyoto Univ.)
(8) 12:25 - 12:50
An Efficient Test Pattern Generator based on Mersenne Twister algorithm
Sayaka Satonaka, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
----- Break ( 85 min. ) -----
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Mon, Feb 10 PM (14:15 - 14:55)
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(9) 14:15 - 14:55
----- Break ( 15 min. ) -----
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Mon, Feb 10 PM (15:10 - 16:25)
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(10) 15:10 - 15:35
A reduction method of shift data volume on BAST
Marika Tanaka, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Masayuki Arai (Nihon Univ)
(11) 15:35 - 16:00
Test Data Reduction Method for BIST-Aided Scan Test by Controlling Scan Shift and Partial Reset of Inverter Code
Ryota Mori, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima)
(12) 16:00 - 16:25
A Low Power Consumption Oriented Test Generation Method for Transition Faults Using Multi Cycle Capture Test Generation
Hiroshi Yamazaki, Yuto Kawatsure, Jun Nishimaki, Atsushi Hirai, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Koji Yamazaki (Meiji Univ)
----- Break ( 15 min. ) -----
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Mon, Feb 10 PM (16:40 - 17:30)
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(13) 16:40 - 17:05
An Implementation of Fault Tolerant Systems with Mutual Reconfiguration Based on Dual-FPGA Architecture
Takuma Mori, Shoichi Ohmoto, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)
(14) 17:05 - 17:30
Detection of Wormhole Attack in Wireless Sensor Network with XMesh Protocol
Takashi Minohara, Aoi Yoshii (Takushoku Univ.)
# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.
Special Talk will have 30 minutes for presentation and 10 minutes for discussion.
=== Technical Committee on Dependable Computing (DC) ===
# FUTURE SCHEDULE:
Sat, Mar 15, 2014 - Sun, Mar 16, 2014: [Mon, Jan 13]
Fri, Apr 25, 2014: [Fri, Feb 14]
Mon, May 26, 2014 - Wed, May 28, 2014: Kitakyushu International Conference Center [Tue, Apr 1], Topics: LSI and System Workshop 2014
Last modified: 2013-12-20 20:27:53
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