Mon, Feb 10 AM
09:00 - 10:15 |
| (1) |
09:00-09:25 |
Module Coupling Overhead Aware Scan Chain Construction |
Meguru Komatsu, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT) |
| (2) |
09:25-09:50 |
On Feasibility of Delay Detection by Time-to-Digital Converter Embedded in Boundary-Scan |
Hiroki Sakurai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) |
| (3) |
09:50-10:15 |
A DFT Method to Achieve 100% Fault Coverage for QDI Asynchronous Circuit |
Sanae Mizutani, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT) |
| |
10:15-10:30 |
Break ( 15 min. ) |
Mon, Feb 10 AM
10:30 - 11:20 |
| (4) |
10:30-10:55 |
Suitable Power-Aware Test Pattern Ordering for Deterministic Circular Self Test Path |
Ryo Ogawa, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT) |
| (5) |
10:55-11:20 |
A Low Power Dissipation Oriented Don't Care Filling Method Using SAT |
Yoshiyasu Takahashi, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ) |
| |
11:20-11:35 |
Break ( 15 min. ) |
Mon, Feb 10 AM
11:35 - 12:50 |
| (6) |
11:35-12:00 |
Note on Weighted Fault Coverage Considering Multiple Defect Sizes and Via Open |
Yuta Nakayama (Tokyo Metro. Univ.), Masayuki Arai (Nihon Univ.), Hongbo Shi, Kazuhiko Iwasaki (Tokyo Metro. Univ.) |
| (7) |
12:00-12:25 |
Device-parameter Estimation Using Framework of Fmax Testing |
Michihiro Shintani, Takashi Sato (Kyoto Univ.) |
| (8) |
12:25-12:50 |
An Efficient Test Pattern Generator based on Mersenne Twister algorithm |
Sayaka Satonaka, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT) |
| |
12:50-14:15 |
Break ( 85 min. ) |
Mon, Feb 10 PM
14:15 - 14:55 |
| (9) |
14:15-14:55 |
|
| |
14:55-15:10 |
Break ( 15 min. ) |
Mon, Feb 10 PM
15:10 - 16:25 |
| (10) |
15:10-15:35 |
A reduction method of shift data volume on BAST |
Marika Tanaka, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Masayuki Arai (Nihon Univ) |
| (11) |
15:35-16:00 |
Test Data Reduction Method for BIST-Aided Scan Test by Controlling Scan Shift and Partial Reset of Inverter Code |
Ryota Mori, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) |
| (12) |
16:00-16:25 |
A Low Power Consumption Oriented Test Generation Method for Transition Faults Using Multi Cycle Capture Test Generation |
Hiroshi Yamazaki, Yuto Kawatsure, Jun Nishimaki, Atsushi Hirai, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Koji Yamazaki (Meiji Univ) |
| |
16:25-16:40 |
Break ( 15 min. ) |
Mon, Feb 10 PM
16:40 - 17:30 |
| (13) |
16:40-17:05 |
An Implementation of Fault Tolerant Systems with Mutual Reconfiguration Based on Dual-FPGA Architecture |
Takuma Mori, Shoichi Ohmoto, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) |
| (14) |
17:05-17:30 |
Detection of Wormhole Attack in Wireless Sensor Network with XMesh Protocol |
Takashi Minohara, Aoi Yoshii (Takushoku Univ.) |