Fri, Apr 26 PM 13:00 - 17:30 |
(1) |
13:00-13:25 |
An Approach to Highly Reliable Scheme for a Digital Power Control |
Kenta Imai, Aromhack Saysanasongkham, Masayuki Arai, Satoshi Fukumoto, Keiji Wada (Tokyo Metropolitan Univ.) |
(2) |
13:25-13:50 |
Stateful NMR based RAID1 |
Minoru Uehara (Toyo Univ.) |
(3) |
13:50-14:15 |
Construction of Real-time Video Stabilizing System on an FPGA |
Hiroshi Maruyama, Toru Yabuki, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) |
(4) |
14:15-14:40 |
Proposal of Source-code Generator named Simple Logic Compiler for Low Power Accelerator CMA |
Nobuaki Ozaki, Hideharu Amano (Keio Univ.) |
|
14:40-14:50 |
Break ( 10 min. ) |
(5) |
14:50-15:40 |
[Invited Talk]
Practical Case Study of Smart Grid and Smart Community |
Hiroaki Nishi (Keio Univ.) |
|
15:40-15:50 |
Break ( 10 min. ) |
(6) |
15:50-16:15 |
Aumenting a Test Suite for Parameter Value Weighting |
Satoshi Fujimoto, Hideharu Kojima, Tatsuhiro Tsuchiya (Osaka Univ.) |
(7) |
16:15-16:40 |
A study for implementing a 3D fluid simulation on an FPGA |
Kenta Fujinami, Akira Sugiura, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) |
(8) |
16:40-17:05 |
On-Chip Delay Measurement Using Adjacent Test Architecture |
Kentaroh Katoh (TNCT) |
(9) |
17:05-17:30 |
A low latency topology for NoC using multiple host links |
Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) |