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Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Seiji Kajihara (Kyushu Inst. of Tech.)
Vice Chair Nobuyasu Kanekawa (Hitachi)
Secretary Tomohiro Nakamura (Hitachi), Tatsuhiro Tsuthiya (Osaka Univ.)

Conference Date Fri, Jun 21, 2013 13:45 - 17:00
Topics Design, Test, Verification 
Conference Place Kikai-Shinko-Kaikan Bldg. 
Address 3-5-8, Shibakoen, Minato-ku, Tokyo, 105-0011 Japan
Transportation Guide Tokyo Metro Hibiya Line Kamiyacho Stn. 6min., Toei Subway Mita Line Onarimon Stn. 8min., Toei Subway Oedo Line Akabanebashi Stn. 10min., Toei Subway Asakusa Line / Oedo Line Daimon Stn. 10min., JR Yamanote Line Hamamatsucho Stn. 15 min.
http://www.jspmi.or.jp/kaigishitsu/access.html

Fri, Jun 21 PM 
13:45 - 15:15
(1) 13:45-14:15 A Controller Augmentation Method to Generate Functional k-Time Expansion Models for Data Path Circuits Yusuke Kodama, Jun Nishimaki, Tetsuya Masuda, Toshinori Hosokawa (Nihon Univ), Hideo Fujiwara (Osaka Gakuin Univ)
(2) 14:15-14:45 A method of deterministic LFSR seed generation for scan-based BIST Takanori Moriyasu, Satoshi Ohtake (Oita Univ.)
(3) 14:45-15:15 A theretical discussion for testabilty of a degraded LSI in field Yasuo Sato, Seiji Kajihara (Kyushu Inst. of Tech.)
  15:15-15:30 Break ( 15 min. )
Fri, Jun 21 PM 
15:30 - 17:00
(4) 15:30-16:00 An Approach of Generating a Test Set to Locate a Pair-Wise Interaction Fault Takahiro Nagamoto, Hideharu Kojima, Tatsuhiro Tsuchiya (Osaka Univ.)
(5) 16:00-16:30 An Online Interconnect Test of SoC with Boundary Scan Shift and Embedded Reconfigurable Core Kentaroh Katoh (TNCT)
(6) 16:30-17:00 A Method of Transistor Degradation Estimation Using Ring Oscillators Tatsunori Ikeda, Yukiya Miura (Tokyo Metropolitan Univ.)

Announcement for Speakers
General TalkEach speech will have 25 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address  


Last modified: 2013-06-18 10:24:50


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