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Technical Committee on Dependable Computing (DC)
Chair: Tomohiro Yoneda (NII) Vice Chair: Seiji Kajihara (Kyushu Inst. of Tech.)
Secretary: Masato Kitagami (Chiba Univ.), Tomohiro Nakamura (Hitachi)

DATE:
Fri, Jun 24, 2011 13:00 - 16:50

PLACE:
Room B3-2 Kikai-shinkou-kaikan Building(3-5-8, Shiba-kouen, Ninato-ku, Tokyo 105-0011 Japan. http://www.jspmi.or.jp/mapright.htm)

TOPICS:
Design, Test, Verification

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Fri, Jun 24 PM (13:00 - 14:30)
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(1) 13:00 - 13:30
An Approach and Evaluation of Fault Tolerant Sequential Circuits for Simultaneous Occurrence of Multiple Transient Faults
Satoshi Fukumoto, Masayuki Arai, Shinya Hara, Kazuhiko Iwasaki (TMU)

(2) 13:30 - 14:00
Effective multi-cycle signatures in testable response analyzers
Yuki Fukazawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)

(3) 14:00 - 14:30
A study on path selection results of an adaptive field test with process variation and aging degradation for VLSI
Satoshi Kashiwazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyuushu Univ)

----- Break ( 10 min. ) -----

----------------------------------------
Fri, Jun 24 PM (14:40 - 15:40)
----------------------------------------

(4) 14:40 - 15:40
[Invited Talk]
International Conference Report - VTS2011(29th IEEE VLSI Test Symposium)
Kazumi Hatayama (NAIST)

----- Break ( 10 min. ) -----

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Fri, Jun 24 PM (15:50 - 16:50)
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(5) 15:50 - 16:20
A don't care identification method with care bit distribution control
-- Application to capture power reduction --
Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ)

(6) 16:20 - 16:50
Low Power At-Speed Scan Testing for LOS Scheme by Test Vector Modification
Kohei Miyase, Yuta Uchinodan, Kazunari Enokimoto (KIT), Yuta Yamato (NAIST), Xiaoqing Wen, Seiji Kajihara (KIT), Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Arnaud Verazel (Lirmm)

# Information for speakers
General Talk will have 20 minutes for presentation and 10 minutes for discussion.
Invited Talk will have 50 minutes for presentation and 10 minutes for discussion.


=== Technical Committee on Dependable Computing (DC) ===
# FUTURE SCHEDULE:

Sat, Jul 2, 2011 - Sun, Jul 3, 2011 (tentative): [Thu, May 19]
Thu, Jul 28, 2011 - Fri, Jul 29, 2011: [Fri, May 13]

# SECRETARY:
Masato Kitakami
Graduate School of Advanced Integration Science,
Chiba University
1-33 Yayoi-cho Inage-ku, Chiba 263-8522 JAPAN
TEL/FAX +43.290.3039
E-mail:fultyba-u


Last modified: 2011-04-15 23:18:06


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