Fri, Oct 31 AM 10:00 - 11:00 |
(1) |
10:00-10:30 |
High-speed page data transfer mechanism on Tender |
Naofumi Kado, Toshihiro Tabata, Hideo Taniguchi (Okayama Univ.) |
(2) |
10:30-11:00 |
HyperShield: A Virtual Machine Monitor for Migrating Running OS to a Secure Virtual Machine |
Tsutomu Nomoto, Yoshihiro Oyama (UEC) |
|
11:00-11:15 |
Break ( 15 min. ) |
Fri, Oct 31 AM 11:15 - 12:15 |
(3) |
11:15-12:15 |
[Special Invited Talk]
The Proposal of the MPLD Architecture for High Performance Computing |
Tetsuo Hironaka, Naoki Hirakawa (Hiroshima City Univ.), Masanori Yoshihara (Hiroshima City Univ./Renesas Technorogy Corp.), Kazuya Tanigawa (Hiroshima City Univ.), Masayuki Sato (Taiyo Yuden Co., Ltd.) |
|
12:15-13:15 |
Lanch ( 60 min. ) |
Fri, Oct 31 PM 13:15 - 14:15 |
(4) |
13:15-14:15 |
[Special Invited Talk]
System LSI Device "MX-G" with Matrix Type Massively Parallel Processor
-- MX core massively parallel processor achives 17GOPS at 168MHz for low-power and high-speed execution of sophisticates image processing tasks -- |
Takeshi Nakamura (Renesas) |
|
14:15-14:30 |
Break ( 15 min. ) |
Fri, Oct 31 PM 14:30 - 16:45 |
(5) |
14:30-15:00 |
Optimization method of data communication PEs for Massively Parallel SIMD processor |
Sumio Hirota, Akihiro Kodama, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
(6) |
15:00-15:30 |
Development of Improved Variable Stages Pipeline Architecture and its LSI Design |
Tomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo (Mie Univ) |
|
15:30-15:45 |
Break ( 15 min. ) |
(7) |
15:45-16:15 |
Performance Evaluation of a Large Scale Reconfigurable Data-Path Utilized for Scientific Application |
Hiroshi Kataoka (Kyushu Univ.), Hiroaki Honda (ISIT), Farhad Mehdipour, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
(8) |
16:15-16:45 |
Flooding Performance Evaluation for Ad Hoc Wireless Network |
Takuo Nakashima, Yuich Hattori, Yuich Hattori (Tokai Univ.) |