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=============================================== Technical Committee on Computer Systems (CPSY) Chair: Yasuhiko Nakashima (NAIST) Vice Chair: Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Tokyo) Secretary: Takashi Miyoshi (Fujitsu Labs.), Michihiro Koibuchi (NII) Assistant: Takeshi Ohkawa (Utsunomiya Univ.), Shinya Takameda (NAIST) =============================================== Special Interest Group on System Architecture (IPSJ-ARC) DATE: Thu, Oct 6, 2016 10:00 - 17:00 PLACE: Meeting Room 104, International Conference Hall(2-1, Nakase, Mihama-ku, Chiba-city, 261-0023 Japan. 5 minutes walk from JR Kaihin Makuhari station. http://www.m-messe.co.jp/en/access/index.html. Hidetsugu Irie, Graduate School of Information Science and Technology, the University of Tokyo. +81-3-5841-6752) TOPICS: Emerging Computer Systems Exhibition ---------------------------------------- Thu, Oct 6 AM Poster and Demonstration Session (10:00 - 16:00) ---------------------------------------- (1)/CPSY 10:00 - 16:00 (See Japanese page.) (2)/CPSY 10:00 - 16:00 [Poster Presentation] Proposal on intuitive text interface using depth camera Hidenobu Doi, Hidetsugu Irie, Shuichi Sakai (UTokyo) (3)/CPSY 10:00 - 16:00 [Poster Presentation] Multi-Processor System Design with Secure Processors Takuya Kajiwara, Mizuki Miyanaga, Hidetsugu Irie, Shuichi Sakai (UTokyo) (4)/CPSY 10:00 - 16:00 [Poster Presentation] Keigo Teramoto, Yoshiki Ebisuhama, Atsushi Kubota, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) (5)/CPSY 10:00 - 16:00 [Poster Presentation] A GPU Implementation of Eigenvalue Computation for a Large Number of Matrices Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota, Masami Saeki (Hiroshima Univ.) (6)/CPSY 10:00 - 16:00 [Poster Presentation] A Loss-Less Data Compression Algorithm for GPUs Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) (7)/CPSY 10:00 - 16:00 (See Japanese page.) (8)/CPSY 10:00 - 16:00 (See Japanese page.) (9)/CPSY 10:00 - 16:00 [Poster Presentation] Processing Aggregation Queries using Interconnected Multiple FPGA Boards Kawahara Naoto, Masato Yoshimi, Chelimuge WU, Tsutomu Yoshinaga (UEC) (10)/CPSY 10:00 - 16:00 [Poster Presentation] Yuki Sawada, Kouta Shigenobu, Hiroki Sugiyama, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa (Utsunomiya Univ.) (11)/CPSY 10:00 - 16:00 [Technology Exhibit] Security technologies for non-volatile memory in IoT devices -- Mechanisms for on-chip MCU and off-chip memory system -- Mikio Hashimoto, Yoshiyuki Amanuma, Kentaro Umesawa, Ryuichi Koike, Jun Kanai, Naoko Yamada (Toshiba) (12) 10:00 - 16:00 (13) 10:00 - 16:00 (14) 10:00 - 16:00 ---------------------------------------- Thu, Oct 6 PM Awarding ceremony (16:30 - 17:00) ---------------------------------------- (15) 16:30 - 17:00 === Technical Committee on Computer Systems (CPSY) === # FUTURE SCHEDULE: Mon, Nov 28, 2016 - Wed, Nov 30, 2016: Ritsumeikan University, Osaka Ibaraki Campus [Sun, Sep 11], Topics: Design Gaia 2016 -New Field of VLSI Design- Thu, Dec 15, 2016 - Fri, Dec 16, 2016: Tokyo Institute of Technology [Tue, Oct 18] Mon, Jan 23, 2017 - Wed, Jan 25, 2017 (tentative): Hiyoshi Campus, Keio Univ. [Mon, Nov 14], Topics: FPGA Applications, etc # SECRETARY: Hidetsugu Irie (the University of Tokyo) TEL +81-3-5841-6788 E-mail: i  e mtl tu-  CPSY WEB http://www.ieice.or.jp/iss/cpsy/jpn/ === Special Interest Group on System Architecture (IPSJ-ARC) === # FUTURE SCHEDULE: Mon, Jan 23, 2017 - Wed, Jan 25, 2017 (tentative): Hiyoshi Campus, Keio Univ. [Mon, Nov 14], Topics: FPGA Applications, etc Last modified: 2016-09-06 14:52:13 |
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