IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev DC Conf / Next DC Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 

===============================================
Technical Committee on Dependable Computing (DC)
Chair: Takashi Aikyo (STARC) Vice Chair: Tomohiro Yoneda (NII)
Secretary: Masato Kitagami (Chiba Univ.), Michinobu Nakao (Renesas)

DATE:
Mon, Feb 15, 2010 09:00 - 16:30

PLACE:


TOPICS:


----------------------------------------
Mon, Feb 15 AM (09:00 - 09:50)
Chair: Masayoshi Yoshimura (Kyushu Univ.)
----------------------------------------

(1) 09:00 - 09:25
A Statistical Method of Small Iddq Variance Outlier Detection
Yoshiyuki Nakamura, Masashi Tanaka (NEC Electronics)

(2) 09:25 - 09:50
Test Pattern Re-Ordering for Thermal-Uniformity during Test
Makoto Nakao, Tomokazu Yoneda, Michiko Inoue, Hideo Fujiwara (Nara Inst. of Sci and Tech.)

----- Break ( 10 min. ) -----

----------------------------------------
Mon, Feb 15 AM (10:00 - 10:50)
Chair: Kohei Miyase (Kyushu Institute of Technology)
----------------------------------------

(3) 10:00 - 10:25
Study on a Test Generation Method for Transition Faults Using Multi Cycle Capture Test
Hiroshi Ogawa, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyusyu Univ.), Koji Yamazaki (Meiji Univ.)

(4) 10:25 - 10:50
Modeling resistive open faults and generating their tests
Hiroshi Takahashi, Yoshinobu Higami, Yuta Shudo, Yuji Takamune, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima)

----- Break ( 10 min. ) -----

----------------------------------------
Mon, Feb 15 AM (11:00 - 11:50)
Chair: Michiko Inoue (Nara Institute of Science and Technology)
----------------------------------------

(5) 11:00 - 11:25
A Method of Reproducing Iuput/Ouput Error Trace on High-level Design for Hardware Debug Support
Yeonbok Lee, Tasuku Nishihara, Takeshi Matsumoto (Univ. of Tokyo.), Masahiro Fujita (Univ. of Tokyo./JST)

(6) 11:25 - 11:50
A binding method for testability based on resources sequential depth reduction
Takaaki Cho, Toshinori Hosokawa (Nihon Univ.)

----- Lunch Break ( 90 min. ) -----

----------------------------------------
Mon, Feb 15 PM (13:20 - 15:00)
Chair: Tomo Inoue (Horoshima City Univ.)
----------------------------------------

(7) 13:20 - 13:45
Reduction of execution times and areas for delay measurement by subtraction
Toru Tanabe, Hirohisa Minato, Kentaroh Katoh, Kazuteru Namba, Hideo Ito (Chiba Univ.)

(8) 13:45 - 14:10
A Test Compaction Oriented Control Point Insertion Method for Transition Faults
Yoshitaka Yumoto, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyusyu Univ.)

(9) 14:10 - 14:35
On Calculation of Delay Test Quality for Test Cubes and X-filling
Shinji Oku, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen (Kyushu Inst. of Tech./JTS)

(10) 14:35 - 15:00
Seed Selection for High Quality Delay Fault Test in BIST
Akira Taketani, Tomokazu Yoneda, Michiko Inoue, Hideo Fujiwara (Nara Inst. of Sci and Tech.)

----- Break ( 15 min. ) -----

----------------------------------------
Mon, Feb 15 PM (15:15 - 16:30)
Chair: Toshinori Hosokawa (Nihon Univ.)
----------------------------------------

(11) 15:15 - 15:40
A Study on Acceptable Faults in Digital Filters
Takumi Miyaguchi, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)

(12) 15:40 - 16:05
High Speed X-Fault Diagnosis with Partial X-Resolution
Kohei Miyase (Kyushu Inst. of Tech.), Yusuke Nakamura (Panasonic Communications Software Co.,Ltd.), Yuta Yamato, Xiaoqing Wen, Seiji Kajihara (Kyushu Inst. of Tech.)

(13) 16:05 - 16:30
Consideration of Open Faults Model Based on Digital Measurement of TEG Chip
Toshiyuki Tsutsumi (Meiji Univ.), Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.


=== Technical Committee on Dependable Computing (DC) ===
# FUTURE SCHEDULE:

Fri, Mar 26, 2010 - Sun, Mar 28, 2010: [Fri, Jan 22]
Tue, Apr 13, 2010: [Wed, Feb 17]

# SECRETARY:
Masato Kitakami
Graduate School of Advanced Integration Science,
Chiba University
1-33 Yayoi-cho Inage-ku, Chiba 263-8522 JAPAN
TEL/FAX +43.290.3039
E-mail:fultyba-u


Last modified: 2010-01-26 16:21:27


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to DC Schedule Page]   /  
 
 Go Top  Go Back   Prev DC Conf / Next DC Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan