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Chair |
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Toshiyuki Shibuya (Fujitsu Labs.) |
Vice Chair |
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Yusuke Matsunaga (Kyushu Univ.) |
Secretary |
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Noriyuki Minegishi (Mitsubishi Electric), Hiroyuki Tomiyama (Ritsumeikan Univ.) |
Assistant |
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Takehiro Miyazawa (MMS), Ryo Yamamoto (Mitsubishi Electric) |
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Chair |
|
Takeshi Yamamura (Fujitsu Labs.) |
Vice Chair |
|
Minoru Fujishima (Hiroshima Univ.) |
Secretary |
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Osamu Watanabe (Toshiba) |
Assistant |
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Takeshi Yoshida (Hiroshima Univ.), Makoto Takamiya (Univ. of Tokyo), Akira Tsuchiya (Kyoto Univ.), Pham Konkuha (Univ. of Electro-Comm.) |
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Chair |
|
Toshiaki Fujii (Nagoya Univ.) |
Vice Chair |
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Seishi Takamura (NTT), Takayuki Hamamoto (Tokyo Univ. of Science) |
Secretary |
|
Atsuro Ichigaya (NHK), Hiroshi Sankoh (KDDI R&D Labs.) |
Assistant |
|
Shohei Matsuo (NTT), Takamichi Miyata (Chiba Inst. of Tech.) |
|
Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) |
[schedule] [select]
|
|
Chair |
|
Masahiro Fukui (Ritsumeikan University) |
Secretary |
|
Kotaro Shimamura (Hitachi), Masao Yokoyama (Sharp), Makoto Sugihara (Kyushu University) |
|
Conference Date |
Thu, Oct 2, 2014 13:00 - 17:05
Fri, Oct 3, 2014 09:30 - 11:10 |
Topics |
|
Conference Place |
Katahira Sakura Hall, Katahira Campus, Tohoku University |
Address |
2-1-1 Katahira, Aoba-ku, Sendai-shi, 980-8577 Japan. |
Transportation Guide |
Ten minutes from JR Sendai Station by bus http://www.tohoku.ac.jp/japanese/profile/campus/01/katahira/ |
Contact Person |
Prof. Masanori Muroyama (Tohoku University) |
Thu, Oct 2 PM Chair: Naofumi Homma (Tohoku University) 13:00 - 14:40 |
(1) VLD |
13:00-13:25 |
Logic Synthesis of Linear Transformation Circuit for Parallel Index Generator |
Yusuke Matsunaga (Kyushu Univ.) |
(2) VLD |
13:25-13:50 |
Local pulse generation in variable stages pipeline designs for low energy consumption |
Takayuki Nii, Youhua Shi, Nozomu Togawa (Waseda Univ.), Kimiyoshi Usami (Shibaura Inst. of Univ.), Masao Yanagisawa (Waseda Univ.) |
(3) VLD |
13:50-14:15 |
Low-power programmable delay element and clock skew tuning by delay locked loop |
Daijiro Murooka, Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu) |
(4) VLD |
14:15-14:40 |
Hierarchical GALS system based on ring segmented bus architecture |
Masafumi Kondo (Kawasaki Univ. of Medical Welfare), Tomoyuki Yokogawa, Yoichiro Sato, Kazutami Arimoto (Okayama Prefectural Univ.) |
|
14:40-14:50 |
Break ( 10 min. ) |
Thu, Oct 2 PM Chair: Toshiyuki Shibuya (Fujitsu Laboratories LTD) 14:50 - 15:40 |
(5) VLD |
14:50-15:40 |
[Invited Talk]
Development of an Instruction Set Simulator and Application to a Satellite Simulator |
Katsumi Okuda, Masanori Kobayashi (MELCO) |
|
15:40-15:50 |
Break ( 10 min. ) |
Thu, Oct 2 PM ICD 15:50 - 17:05 |
(6) ICD |
15:50-16:15 |
Study on Target Impedance of Power Supply Network for Maintain Power and Signal Integrity |
Toma Yamaguchi, Toshio Sudo (Shibaura Inst. of Tech.) |
(7) ICD |
16:15-16:40 |
A Low Supply Voltage Six-Transistor CMOS SRAM Employing Adaptively Lowering Memory Cell Supply Voltage for "Write" Operation |
Nobuaki Kobayashi (Nagaoka Univ. of Tech.), Ryusuke Ito, Tadayoshi Enomoto (Chuo Univ.) |
(8) ICD |
16:40-17:05 |
A Cache Memory with Line and Tile Data Accessibility |
Baokang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki (Mie Univ.) |
Fri, Oct 3 AM IE 09:30 - 11:10 |
(9) IE |
09:30-09:55 |
Real-time reducing whiteout technology for surveillance cameras |
Shinichiro Hirooka, Daisuke Yoshida, Yuichi Nonaka (Hitachi) |
(10) IE |
09:55-10:20 |
Subjective assessment of super-resolution
-- Paired comparison with 4K TV -- |
Masaki Sugie, Seiichi Gohshi, Hirohisa Takeshita, Chinatsu Mori (Kogakuin Univ.) |
(11) IE |
10:20-10:45 |
Adaptive Expanding Diamond Search using Sub-Sampled Image except in the Small Central Area |
Atsushi Tachino, Ryutaro Nishimura, Toshio Kondo, Takahiro Sasaki, Yuki Fukazawa (Mie Univ.) |
(12) IE |
10:45-11:10 |
Highly Efficient SIMD Data Path for Motion Estimation |
Keita Watanabe, Yuki Minoura, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki (Mie Univ.) |
Announcement for Speakers |
General Talk | Each speech will have 20 minutes for presentation and 5 minutes for discussion. |
Contact Address and Latest Schedule Information |
VLD |
Technical Committee on VLSI Design Technologies (VLD) [Latest Schedule]
|
Contact Address |
Noriyuki Minegishi (Mitsubishi Electric Corporation)
E-: giajbielectc
Tel: 0467-41-2944 |
Announcement |
See also VLD's homepage:
http://www.ieice.org/~vld/ |
ICD |
Technical Committee on Integrated Circuits and Devices (ICD) [Latest Schedule]
|
Contact Address |
Osamu WATANABE (Toshiba Corporation)
TEL 044-549-228,FAX 044-520-1806
E-:o7beba |
IE |
Technical Committee on Image Engineering (IE) [Latest Schedule]
|
Contact Address |
Atsuro Ichigaya (NHK)
E-: ie-n2014 |
IPSJ-SLDM |
Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) [Latest Schedule]
|
Contact Address |
Makoto Sugihara (Kyushu University)
Email sldm2013caitkshu-u |
Announcement |
Please see the IPSJ-SLDM page below:
http://www.sig-sldm.org/ |
Last modified: 2014-09-24 17:38:48
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