|
|
| Chair |
|
Moritoshi Yasunaga (Univ. of Tsukuba) |
| Vice Chair |
|
Shorin Kyo (Renesas), Minoru Watanabe (Shizuoka Univ.) |
| Secretary |
|
Nobuya Watanabe (Okayama Univ.), Yutaka Yamada (Toshiba) |
| Assistant |
|
Yoshiki Yamaguchi (Univ. of Tsukuba) |
|
| Conference Date |
Mon, May 20, 2013 14:00 - 18:05
Tue, May 21, 2013 09:00 - 16:00 |
| Topics |
Reconfigurable Systems, etc. |
| Conference Place |
Kochi Prefectural Culture Hall |
| Address |
3-3-30 Honmachi, Kochi, Kochi, 780-0870, Japan |
| Transportation Guide |
http://www.kochi-bunkazaidan.or.jp/~hall/access.html |
Contact
Person |
Yukio Mitsuyama
088-824-5321（Hall） |
Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Mon, May 20 PM Invited Keynote
Chair: Moritoshi Yasunaga
14:00 - 15:00 |
| (1) |
14:00-15:00 |
[Keynote Address]
Challenging Connect6 Hardware Design Competitions  RECONF2013-1 |
Kentaro Sano (Tohoku Univ.) |
Mon, May 20 PM
15:00 - 16:15 |
| (2) |
15:00-15:25 |
An FPGA Implementation of the Progressive Tree Neighborhood Algorithm
-- Phylogenetic Tree Reconstruction with Maximum Parsimony -- RECONF2013-2 |
Henry Block, Tsutomu Maruyama (Univ. of Tsukuba) |
| (3) |
15:25-15:50 |
Implementation and Evaluation of Data Compression Hardware for Bandwidth Enhancement of Multiple Data Streams RECONF2013-3 |
Tomohiro Ueno, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) |
| (4) |
15:50-16:15 |
FPGA Acceleration of Short Read Mapping RECONF2013-4 |
Yoko Sogabe, Tsutomu Maruyama (Univ. of Tsukuba) |
| |
16:15-16:25 |
Break ( 10 min. ) |
Mon, May 20 PM Reconfigurable Architecture
16:25 - 18:05 |
| (5) |
16:25-16:50 |
Speed-up of Dynamically Reconfigurable Processor Array RECONF2013-5 |
Toru Katagiri, Hideharu Amano (Keio Univ.) |
| (6) |
16:50-17:15 |
Proposal of a Dependable Fine-grained Reconfigurable Device with ECC Technology RECONF2013-6 |
Yuki Yoshida, Kentaro Takaki, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.), Kenichi Shimomai, Takashi Ishiguro (TAIYO YUDEN) |
| (7) |
17:15-17:40 |
An optically reconfigurable gate array using a temperature dependable holographic memory RECONF2013-7 |
Retsu Moriwaki, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.) |
| (8) |
17:40-18:05 |
Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis RECONF2013-8 |
Hiroaki Konoura, Dawood Alnajjar (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Hiroyuki Ochi (Ritsumeikan Univ.), Takashi Imagawa (Kyoto Univ.), Shinichi Noda, Kazutoshi Wakabayashi (NEC), Masanori Hashimoto, Takao Onoye (Osaka Univ.) |
Tue, May 21 AM Invited Keynote
Chair: Tetsuo Hironaka
09:00 - 10:00 |
| (9) |
09:00-10:00 |
[Invited Talk]
A Challenge of Acceleration of DA Algorithm by Parallel Processing RECONF2013-9 |
Michiaki Muraoka (Kochi Univ.) |
| |
10:00-10:10 |
Break ( 10 min. ) |
Tue, May 21 AM
Chair: Kazuya Tanigawa
10:10 - 11:50 |
| (10) |
10:10-10:35 |
Design and Evaluation of FPGA-based ASIC Emulator using High-speed Serial Communication RECONF2013-10 |
Takashige Uda, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
| (11) |
10:35-11:00 |
Implementation of Speculative Gather System for CMA RECONF2013-11 |
Rie Uno, Nobuaki Ozaki, Mai Izawa, Akihito Tsusaka, Takaaki Miyajima, Hideharu Amano (Keio Univ.) |
| (12) |
11:00-11:25 |
Performance model evaluation for 3-D stencil computation using a high-level synthesis tool RECONF2013-12 |
Keisuke Dohi, Yoshihiro Nakamura, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) |
| (13) |
11:25-11:50 |
A defect-robust FPGA-IP core architecture RECONF2013-13 |
Motoki Amagasaki, Kazuki Inoue, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
| |
11:50-13:20 |
Lunch ( 90 min. ) |
Tue, May 21 PM
Chair: Nobuya WATANABE
13:20 - 14:35 |
| (14) |
13:20-13:45 |
Video based real-time feature extraction and abnormal action detection on an FPGA RECONF2013-14 |
Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) |
| (15) |
13:45-14:10 |
FAST COMPUTATION OF THE OPTICAL FLOW USING FPGA RECONF2013-15 |
Yu Tanabe, Tsutomu Maruyama (Univ. of Tsukuba) |
| (16) |
14:10-14:35 |
An FPGA-based Sound Synthesizer and its GUI RECONF2013-16 |
Suguru Ochiai, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) |
| |
14:35-14:45 |
Break ( 10 min. ) |
Tue, May 21 PM
Chair: Yukio Mitsuyama
14:45 - 16:00 |
| (17) |
14:45-15:10 |
Performance Evaluation of Physical Unclonable FUnctions on Kintex-7 FPGA RECONF2013-17 |
Yohei Hori, Toshihiro Katashita, Kazukuni Kobara (AIST) |
| (18) |
15:10-15:35 |
Study of Runtime Binary Acceleration on TCA node RECONF2013-18 |
Takaaki Miyajima, Takuya Kuhara (Keio Univ.), Toshihiro Hanawa (Univ. of Tsukuba), David Thomas (Imperial College), Hideharu Amano (Keio Univ.) |
| (19) |
15:35-16:00 |
The 3-D fluid computation on an FPGA system RECONF2013-19 |
Kenta Fujinami, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) |
| Announcement for Speakers |
| General Talk | Each speech will have 20 minutes for presentation and 5 minutes for discussion. |
| Contact Address and Latest Schedule Information |
| RECONF |
Technical Committee on Reconfigurable Systems (RECONF) [Latest Schedule]
|
| Contact Address |
Yoshiki YAMAGUCHI
University of Tsukuba, Japan
E- :  conf201305 lila    ba
TEL: 029-853-5760
FAX: 029-853-5760 |
Last modified: 2013-06-11 20:07:31
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