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Technical Committee on Circuits and Systems (CAS) [schedule] [select]
Chair Hisanori Fujisawa (Fujitsu Labs.)
Vice Chair Mitsunori Makino (Chuo Univ.)
Secretary Hiroshi Yamazaki (Fujitsu Labs.), Taketomo Kanazawa (Shibaura Inst. of Tech.)
Assistant Daisuke Takafuji (Hiroshima Univ.)

Technical Committee on Nonlinear Problems (NLP) [schedule] [select]
Chair Kiyotaka Yamamura (Chuo Univ.)
Vice Chair Shinji Doi (Kyoto Univ.)
Secretary Yoshihiko Horio (Tokyo Denki Univ.), Isao Tokuda (JAIST)
Assistant Hisashi Aomori (Tokyo Univ. of Science), Kohei Yamasue (Kyoto Univ.)

Conference Date Thu, Sep 24, 2009 10:05 - 17:55
Fri, Sep 25, 2009 09:00 - 14:15
Topics  
Conference Place HigashiSenda Campus, Hiroshima University 
Address 1-89, Higashisendacho 1-chome, Naka-ku, Hiroshima-shi, 730-0053 Japan.
Transportation Guide http://www.hiroshima-u.ac.jp/en/top/access/index.html
Announcement Please join us for a banquet on September 24th after the conference.

Thu, Sep 24 AM  CAS(1)
10:05 - 11:45
(1) 10:05-10:30 Vertex-Deletion-based Enhancement of Heuristic Algorithms for Extracting a Maximum Induced Tree of a Graph Hiroyuki Yoshida, Daisuke Takafuji, Satoshi Taoka, Toshimasa Watanabe (Hiroshima Univ.)
(2) 10:30-10:55 Correlation-Based Image Watermarking Based on Smoothing Hideaki Kadota, Masayoshi Nakamoto, Shuichi Ohno (Hiroshima Univ.)
(3) 10:55-11:20 Detection Method for Digital Watermark with Dual-Sided Correlation Tomotaka Harano, Masayoshi Nakamoto, Hideaki Kadota, Shuichi Ohno (Hiroshima Univ.)
(4) 11:20-11:45 Comparison between Interval Arithmetic and Affine Arithmetic in Tracing Solution Curve of Nonlinear Equation Hirotoshi Shingu, Yuchi Kanzawa (Shibaura Inst. of Tech.)
  11:45-13:00 Lunch Break ( 75 min. )
Thu, Sep 24 PM  CAS(2)
13:00 - 14:15
(5) 13:00-13:25 A Reducing Method for Electromagnetic Interference on Electronic Control Unit by Optimization System with Parallel Processing Yuji Okazaki (Shizuoka Univ.), Takanori Uno (DENSO), Hideki Asai (Shizuoka Univ.)
(6) 13:25-13:50 Fast Simulation of Power Distribution Network Based on Semi-Implicit Numerical Integration Tomoki Ishimaru, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.)
(7) 13:50-14:15 Fast Circuit Simulation Based on GPGPU-LIM and Its Estimation Yuta Inoue, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.)
  14:15-14:30 Break ( 15 min. )
Thu, Sep 24 PM  NLP(1)
14:30 - 15:45
(8) 14:30-14:55 Solving Differential Equation Using GPU Keitaro Yamada, Yuichi Tanji (Kagawa Univ.)
(9) 14:55-15:20 Finding All DC Solutions of Piecewise-Linear Circuits Using Integer Programming Naoya Tamura, Kiyotaka Yamamura (Chuo Univ.)
(10) 15:20-15:45 Probability Distribution and Its Applications for Local Standard Fractal Dimension Kenichi Kamijo (Toyo Univ.), Akiko Yamanouchi (IORI)
  15:45-16:00 Break ( 15 min. )
Thu, Sep 24 PM 
16:00 - 16:55
(11) 16:00-16:55 [Invited Talk]
Massive-Parallel Memory-Embedded SIMD Processor Architecture
Tetsushi Koide, Takeshi Kumaki, Hans Juergen Mattausch (Hiroshima Univ.)
  16:55-17:00 Break ( 5 min. )
Thu, Sep 24 PM 
17:00 - 17:55
(12) 17:00-17:55 [Invited Talk]
A tiny procesosr with assembler and compiler for education and small embedded systems
Koji Nakano (Hiroshima Univ.)
Fri, Sep 25 AM  CAS(3)
09:00 - 09:50
(13) 09:00-09:25 Analysis of Process Variations by using Ring Oscillator Akihiro Kaya, Koh Johguchi, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.)
(14) 09:25-09:50 Image Segmentation Algorithm with Parameter Self-Adjustment Considering the Image Characteristic Ryosuke Kimura, Tatsuya Sugahara, Tomoya Renge, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.)
  09:50-10:00 Break ( 10 min. )
Fri, Sep 25 AM  NLP(2)
10:00 - 10:50
(15) 10:00-10:25 On Optimization Process of PSO-based Design of DC/AC Inverters Katsuma Ono, Toshimichi Saito (Hosei Univ.), Kenya Jin'no (Nippon Inst. of Tech.)
(16) 10:25-10:50 Experimental Study of an Interrupted Electric Circuit with PWM-1 Control Hiroto Furukawa, Hiroyuki Asahara, Takuji Kousaka (Oita Univ.)
  10:50-11:00 Break ( 10 min. )
Fri, Sep 25 AM  CAS(4)
11:00 - 11:50
(17) 11:00-11:25 Associative-Memory-Based LSI Architecture with Automatic Learning Functionality and Application to Handwritten-Character Recognition Wataru Imafuku, Tania Ansari, Akio Kawabata, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.)
(18) 11:25-11:50 Efficient Ternary Multiple Search-Operation Architecture based on Flexible Multi-Ported Content Addressable Memory and its Application Takeshi Kumaki, Yuta Imai, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.)
  11:50-13:00 Break ( 70 min. )
Fri, Sep 25 PM  NLP(3)
13:00 - 14:15
(19) 13:00-13:25 Frequency Modulation Oscillators using Printed-Spiral-Inductors Toru Tanaka, Kazuhisa Yoshimatsu, Masayuki Yamauchi (Hiroshima Inst. of Tech.), Mamoru Tanaka (Sophia Univ.)
(20) 13:25-13:50 An experimental study of the CMOS PLL as an FM demodulator for Gaussian noise genaration Akio Takada (Hakodate Nat. Col. of Tech.), Tetsuro Endo (Meiji Univ.)
(21) 13:50-14:15 A Single-Electron Bandpass Digital Wave Filter Takashi Yasuno, Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Kazuhisa Haeiwa (Hiroshima City Univ.)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 45 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
CAS Technical Committee on Circuits and Systems (CAS)   [Latest Schedule]
Contact Address Hiroshi YAMAZAKI (Fujitsu Laboratories Ltd.)
TEL +81-45-473-5801
E--mail: si 
NLP Technical Committee on Nonlinear Problems (NLP)   [Latest Schedule]
Contact Address Yoshihiko Horio (Dept. of Electrical and Electronic Engineering, Tokyo Denki Univ.)
E--mail: oeeedeni
TEL +81-3-5280-3362, FAX +81-3-5280-3565 


Last modified: 2009-09-01 09:47:14


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