Thu, May 22 PM  13:00 - 14:40
(1)	13:00-13:25	A Study of a Fault-Tolerant System using Partial Reconfiguration RECONF2008-1	Atsuhiro Kanamaru, Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga (Tsukuba Univ.)
(2)	13:25-13:50	An Implementation of High Precision Floating-point Operation Units on FPGA RECONF2008-2	Naohito Nakasato (Univ. Aizu), Tadashi Ishikawa (KEK)
(3)	13:50-14:15	Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems RECONF2008-3	Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda (AIST)
(4)	14:15-14:40	FPGA Implementation of Elliptic Curve Arithmetic in Characteristic Five by High-level Synthesis RECONF2008-4	YoungKwang Moon (Tokyo Univ.), Hideyuki Tsuchiya, Yuichiro Shibata, Ryuichi Harasawa, Kiyoshi Oguri (Nagasaki Univ.)
	14:40-14:50	Break ( 10 min. )
Thu, May 22 PM  14:50 - 16:30
(5)	14:50-15:15	Development of Compiler for Dynamic Reconfigurable Architecture DS-HIE which Adopts Digit-serial Computation RECONF2008-5	Yasuhiro Nishinaga, Takuro Uchida, Tetsuya Zuyama, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.)
(6)	15:15-15:40	Path Planning Method for MIMD Controlled data communication in MX Core RECONF2008-6	Akihiro Kodama, Yuta Mizokami, Mitsutaka Nakano, Masahiro Iida, Toshinori Sueyoshi (kumamoto Univ.)
(7)	15:40-16:05	A Link Removal Methodology for Application-Specific Networks-on-chip on FPGAs RECONF2008-7	Daihan Wang (Keio Univ./JST), Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII/JST), Hideharu Amano (Keio Univ.)
(8)	16:05-16:30	A Novel Cluster Structure for Variable Grain Logic Cell RECONF2008-8	Kazuki Inoue, Kazunori Matsuyama, Yoshiaki Satou, Masahiro Koga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
	16:30-16:40	Break ( 10 min. )
Thu, May 22 PM  16:40 - 17:30
(9)	16:40-17:30	[Invited Talk] RadidMatriX: 2D Array Processor for Algebraic Path Problem RECONF2008-9	Toshiaki Miyazaki (Univ. of Aizu)
Fri, May 23 AM  09:00 - 10:15
(10)	09:00-09:25	Designing And Evaluating Dynamically Reconfigurable Processor with Power Gating Technique RECONF2008-10	Yoshiki Saito (Keio Univ.), Toshiaki Shirai (Shibaura Inst.), Takuro Nakamura, Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi (Keio Univ.), Toshihiro Kashima, Mitsutaka Nakata, Seidai Takeda, Kimiyoshi Usami (Shibaura Inst.), Hideharu Amano (Keio Univ.)
(11)	09:25-09:50	A multi-context dynamic optically reconfigurable gate array using a silver-halide holographic memory RECONF2008-11	Daisaku Seto, Minoru Watanabe (Shizuoka Univ.)
(12)	09:50-10:15	Fast optical reconfigurations of four-contexts ORGAs RECONF2008-12	Mao Nakajima, Minoru Watanabe (Shizuoka Univ.)
	10:15-10:25	Break ( 10 min. )
Fri, May 23 AM  10:25 - 12:05
(13)	10:25-10:50	Feature Extraction from Stereo Images by FPGA-Based Stream Processing RECONF2008-13	Shinsuke Nino, Hidenori Matsubayashi, Yuichiro Shibata, Tsuyoshi Hamada, Kiyoshi Oguri (Nagasaki Univ.)
(14)	10:50-11:15	An Approach for Downscaling Images for Real-time Pattern Detection RECONF2008-14	Yoshifumi Tanida, Tsutomu Maruyama (Univ. of Tsukuba)
(15)	11:15-11:40	How fast is an FPGA in image processing ? RECONF2008-15	Takashi Saegusa, Tsutomu Maruyama, Yoshiki Yamaguchi (Univ. of Tsukuba)
(16)	11:40-12:05	An implementation of a watershed algorithm based on connected components on FPGA RECONF2008-16	Dang Ba Khac Trieu, Tsutomu Maruyama (Univ. of Tsukuba)
	12:05-13:00	Lunch Break ( 55 min. )
Fri, May 23 PM  13:00 - 14:15
(17)	13:00-13:25	Implementation and Evaluation of OS Functions for a Computer System Having FPGA Devices RECONF2008-17	Kazuya Tokunaga, Akira Kojima, Tetsuo Hironaka (Hiroshima City Univ)
(18)	13:25-13:50	Context Virtualization Techniques for Dynamically Reconfigurable Hardware RECONF2008-18	Takeshi Inuo, Kengo Nishino, Nobuki Kajihara (NEC)
(19)	13:50-14:15	Context Virtualization mechanism for Dynamically Reconfigurable Hardware RECONF2008-19	Kengo Nishino, Takeshi Inuo, Nobuki Kajihara (NEC)
	14:15-14:25	Break ( 10 min. )
Fri, May 23 PM  14:25 - 15:40
(20)	14:25-14:50	Pipeline Scheduling with Input Port Constraints for an FPGA-based Biochemical Simulator RECONF2008-20	Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata (Nagasaki Univ.), Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Toshinori Kojima, Hideharu Amano, Akira Funahashi (Keio Univ.), Noriko Hiroi (EMPL-EBI), Kiyoshi Oguri (Nagasaki Univ.)
(21)	14:50-15:15	Implementation and Evaluation of an Efficient Fluid Analysis System on Multiple FPGAs RECONF2008-21	Hirokazu Morishita, Yasunori Osana (Keio Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.)
(22)	15:15-15:40	Design and Implementation of Viterbi Decoder for Multi-Constraint Length Using Reconfigurable Processor RECONF2008-22	Yuken Kishimoto, Shinichiro Haruyama, Masao Nakagawa, Hideharu Amano (Keio Univ.)

Contact Address and Latest Schedule Information
RECONF	Technical Committee on Reconfigurable Systems (RECONF)   [Latest Schedule]
	Contact Address	Yohei HORI (AIST) E-: yaist TEL: +81-29-861-5080 (Ext.)55459 FAX: +81-29-861-5909

Last modified: 2008-05-14 11:12:53