Fri, Mar 18 AM
09:40 - 11:45 |
| (1) |
09:40-10:05 |
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| (2) |
10:05-10:30 |
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| (3) |
10:30-10:55 |
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| (4) |
10:55-11:20 |
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| (5) |
11:20-11:45 |
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Fri, Mar 18 AM
09:40 - 11:45 |
(6)
DC |
09:40-10:05 |
Examination of network fault detection method by use of AFM |
Isao Shimokawa, Toshiaki Tarui, Hiroki Miyamoto, Tomohiro Baba (hitachi) |
(7)
DC |
10:05-10:30 |
Diagnosis for Automotive Electronic Control System
-- Extraction of Singular Relation from CAN data with WPMax-SAT -- |
Shuichi Sato, Takuro Kutsuna (TCRDL), Naoya Chujo (AIT), Noriyoshi Sano (TCRDL) |
(8)
DC |
10:30-10:55 |
Development of a Network Recorder for High-Speed Real-Time Data Acquisition and Packet Capture |
Kenji Toda, Mamoru Sekiyama (AIST) |
(9)
DC |
10:55-11:20 |
Modeling of Timing Faults and Test Generation for Single Flux Quantum Logic Circuits |
Nobutaka Kito (Kyoto Univ.), Kazuyoshi Takagi (Nagoya Univ.), Naofumi Takagi (Kyoto Univ.) |
(10)
DC |
11:20-11:45 |
Design Method of Easily Testable Parallel Adders under Delay Constraints |
Shinichi Fujii (Nagoya Univ.), Naofumi Takagi (Kyoto Univ.) |
| |
11:45-13:00 |
Lunch ( 75 min. ) |
Fri, Mar 18 PM
13:00 - 14:15 |
| (11) |
13:00-13:25 |
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| (12) |
13:25-13:50 |
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| (13) |
13:50-14:15 |
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Fri, Mar 18 PM
13:25 - 14:15 |
| (14) |
13:25-13:50 |
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| (15) |
13:50-14:15 |
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14:15-14:30 |
Break ( 15 min. ) |
Fri, Mar 18 PM
14:30 - 15:45 |
| (16) |
14:30-14:55 |
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| (17) |
14:55-15:20 |
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| (18) |
15:20-15:45 |
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Fri, Mar 18 PM
14:30 - 15:45 |
| (19) |
14:30-14:55 |
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| (20) |
14:55-15:20 |
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| (21) |
15:20-15:45 |
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| |
15:45-16:00 |
Break ( 15 min. ) |
Fri, Mar 18 PM
16:00 - 17:15 |
| (22) |
16:00-16:25 |
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| (23) |
16:25-16:50 |
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| (24) |
16:50-17:15 |
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Fri, Mar 18 PM
16:00 - 17:15 |
| (25) |
16:00-16:25 |
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| (26) |
16:25-16:50 |
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| (27) |
16:50-17:15 |
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- |
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Sat, Mar 19 AM
09:00 - 10:40 |
| (28) |
09:00-09:25 |
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| (29) |
09:25-09:50 |
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| (30) |
09:50-10:15 |
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| (31) |
10:15-10:40 |
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Sat, Mar 19 AM
09:00 - 10:40 |
| (32) |
09:00-09:25 |
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| (33) |
09:25-09:50 |
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| (34) |
09:50-10:15 |
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| (35) |
10:15-10:40 |
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10:40-10:55 |
Break ( 15 min. ) |
Sat, Mar 19 AM
10:55 - 12:10 |
| (36) |
10:55-11:20 |
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| (37) |
11:20-11:45 |
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| (38) |
11:45-12:10 |
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Sat, Mar 19 AM
10:55 - 12:10 |
| (39) |
10:55-11:20 |
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| (40) |
11:20-11:45 |
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(41)
CPSY |
11:45-12:10 |
Virtual HILS
-- Efficient software validation by entire system virtualization -- |
Yasuhiro Ito, Yasuo Sugure, Shigeru Oho (HItachi) |
| |
12:10-13:15 |
Lunch ( 65 min. ) |
Sat, Mar 19 PM
13:15 - 14:30 |
| (42) |
13:15-13:40 |
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| (43) |
13:40-14:05 |
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| (44) |
14:05-14:30 |
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Sat, Mar 19 PM
13:15 - 14:30 |
(45)
CPSY |
13:15-13:40 |
Performance Evaluation of High Performance Linpack on a Cell/B.E. Cluster with Heterogeneous Interconnect |
Ryota Nishida, Tetsuya Nakahama, Toshiaki Kamata, Yuri Nishikawa, Hideharu Amano (Keio Univ.) |
(46)
CPSY |
13:40-14:05 |
Implementation and evaluation of Meresenne Twister with massive-parallel SIMD processing |
Youhei Mochizuki, Naoyuki Yoshida, Naoki Matsumoto, Yuma Murakami, Takeshi Kumaki, Takeshi Fujino (Ritsumeikan Univ.) |
(47)
CPSY |
14:05-14:30 |
A study on parallel cryptographic processing with ultra-compact single-board computer |
Takeshi Kumaki, Yuichiro Kurokawa, Takeshi Fujino (Ritsumeikan Univ.) |
| |
14:30-14:45 |
Break ( 15 min. ) |
Sat, Mar 19 PM
14:45 - 16:00 |
| (48) |
14:45-15:10 |
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| (49) |
15:10-15:35 |
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| (50) |
15:35-16:00 |
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Sat, Mar 19 PM
14:45 - 16:00 |
(51)
CPSY |
14:45-15:10 |
Parallel C code generation from Simulink models |
Takahiro Kumura (NEC/Osaka Univ.), Masato Edahiro, Yuichi Nakamura (NEC), Nagisa Ishiura (Kwansei Gakuin Univ.), Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) |
(52)
CPSY |
15:10-15:35 |
An Architecture for Low-Latency Anonymizing Mechanism |
Junichi Sawada, Koichi Inoue, Hiroaki Nishi (Keio Univ.) |
(53)
CPSY |
15:35-16:00 |
A Cache Control Method for Optimizing Receive Queue with Cache Injection |
Ryota Mibu, Tomoyoshi Sugawara (NEC) |
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