Online edition: ISSN 2432-6380
[TOP] | [2016] | [2017] | [2018] | [2019] | [2020] | [2021] | [2022] | [Japanese] / [English]
DC2019-86
On Machine Learning Based Accuracy Improvement for A Digital Temperature and Voltage Sensor
Masayuki Gondo, Yousuke Miyake, Seiji Kajihara (Kyutech)
pp. 1 - 6
DC2019-87
Defective Chip Prediction Modeling Using Convolutional Neural Networks
Ryunosuke Oka, Satoshi Ohtake (Oita Univ.), Kouichi Kumaki (Renesas)
pp. 7 - 12
DC2019-88
A study on temperature dependence on discrimination of resistive opens using machine learning-based anomaly detection
Ryotaroh Nakanishi, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.)
pp. 13 - 18
DC2019-89
Method for Inserting Fault-Detection-Strengthened Test Point under Multi-cycle Testing
Tomoki Aono, Norihiro Nakaoka, Shyu Saikou, Wang Senling, Higami Yoshinobu, Hiroshi Takahashi (Ehime Univ.), Hiroyuki Iwata, Youichi Maeda, Jun Matsushima (Renesas)
pp. 19 - 24
DC2019-90
A controller augmentation method to reduce the number of untestable faults for multiplexers with n-inputs
Yuki Takeuchi, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.)
pp. 25 - 30
DC2019-91
Glitch PUF utilizing Unrolled Architecture and its Evaluation
Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)
pp. 31 - 36
DC2019-92
A Don’t Care Identification-Filling Co-Optimization Method for Low Power Testing Using Partial Max-SAT
Kenichiro Misawa, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ), Masayoshi Yoshimura (Kyouto Sangyo Univ), Masayuki Arai (Nihon Univ)
pp. 37 - 42
DC2019-93
Power Analysis for Logic Area of LSI Including Memory Area
Yuya Kodama, Kohei Miyase, Daiki Takafuji, Xiaoqing Wen, Seiji Kajihara (Kyutech)
pp. 43 - 48
DC2019-94
Improving Controllability of Signal Transitions in the High Switching Area of LSI
Jie Shi, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara (Kyutech)
pp. 49 - 54
DC2019-95
Frequency Variation of Ring Oscillators During Long-Time Operation on FPGA
Shingo Tsutsumi, Yukiya Miura (Tokyo Metropolitan Univ.)
pp. 55 - 60
DC2019-96
Accurate Recycled FPGA Detection Based on Exhaustive Path Analysis
Michihiro Shintani, Foisal Ahmed, Michiko Inoue (NAIST)
pp. 61 - 66
DC2019-97
Soft Error Tolerance of Power-Supply-Noise Hardened Latches
Yuya Kinoshita, Yukiya Miura (Tokyo Metropolitan Univ.)
pp. 67 - 72
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.