IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 119, Number 260

Hardware Security

Workshop Date : 2019-11-01 / Issue Date : 2019-10-25

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Table of contents

HWS2019-57
Implementation and Evaluation of EC-ElGamal Encryption with a Twisted Montgomery Curve over Tower Field on Arduino
Yuta Hashimoto, Tadaki Kanenari, Takuya Kusaka, Yasuyuki Nogami (Okayama Univ.)
pp. 1 - 5

HWS2019-58
An Implementation of Tate and Ate Pairing of Embedding Degree 14
Zihao Song, Rikuya Matsumura, Yuki Nanjo, Yasuyuki Nogami, Takuya Kusaka (Okayama Univ.)
pp. 7 - 12

HWS2019-59
A Study on Correlation Electromagnetics Analysis on Pairing-based Cryptographic Hardware of Unified Hardware
Yuma Kadowaki, Rei Ueno, Ville Yli-Mäyry (Tohoku Univ.), Daisuke Fujimoto, Yuichi Hayashi (NAIST), Makoto Nagata (Kobe Univ.), Makoto Ikeda (UT), Tsutomu Matsumto (YNU), Naofumi Homma (Tohoku Univ.)
pp. 13 - 18

HWS2019-60
A Design of Isogeny-Based Cryptographic Hardware Architecture Using Residue Number System
Shuto Funakoshi, Rei Ueno, Naofumi Homma (Tohoku Univ.)
pp. 19 - 24

HWS2019-61
Countermeasures for power noise and side-channel leakage in crypto modules (Ⅱ)
Kazuki Monta, Akihiro Tsukioka, Daichi Nakagawa, Kazuki Yasuoka, Noriyuki Miura, Makoto Nagata (Kobe Univ.), Karthik Srinivasan, Shan Wan, Lang Lin, Ying-Siun Li, Norman Chang (ANSYS)
pp. 25 - 28

HWS2019-62
Fundamental study on an estimation method of output bits from TERO-based TRNG during frequency injection attack
Saki Osuka, Daisuke Fujimoto, Yuichi Hayashi (NAIST)
pp. 29 - 34

HWS2019-63
A Study of Hardware Trojan Detection Method using Deep Learning in Asynchronous Circuits
Hikaru Inafune, Masashi Imai (Hirosaki Univ.)
pp. 35 - 40

HWS2019-64
Demonstration of Adversarial Examples for Hardware Trojan Detection
Kohei Nozawa, Kento Hasegawa (Waseda Univ.), Seira Hidano, Shinsaku Kiyomoto (KDDI Research), Kazuo Hashimoto, Nozomu Togawa (Waseda Univ.)
pp. 41 - 46

HWS2019-65
Physical-level detection approach against hardware Trojans inside semiconductor chips (I)
Shinichi Kawamura, Kentaro Imafuku, Hirofumi Sakane, Yohei Hori (AIST), Makoto Nagata (AIST/Kobe Univ.), Yuichi Hayashi (AIST/NAIST), Tsutomu Matsumoto (AIST/YNU)
pp. 47 - 52

HWS2019-66
(See Japanese page.)
pp. 53 - 58

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan