Print edition: ISSN 0913-5685
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VLD2006-140
Easily Testable Multiplier with 4-2 Adder Tree
Nobutaka Kito, Kensuke Hanai, Naofumi Takagi (Nagoya Univ.)
pp. 1 - 6
VLD2006-141
Effect of the Number of Wiring Layers on the Chip Area of Multipliers
Hirotaka Kawashima, Naofumi Takagi, Kazuyoshi Takagi (Nagoya Univ.)
pp. 7 - 11
VLD2006-142
A Combined Circuit for Multiplication and Inversion in GF(2^m) Based on the Extended Euclid's Algorithm
Katsuki Kobayashi, Naofumi Takagi (Nagoya Univ.)
pp. 13 - 18
VLD2006-143
A Study of Fast Projective Transformation Method
Yoshinori Yamada, Yasuhide Kimura, Daisuke Itou, Tomoyuki Yokogawa, Yoichiro Sato, Michiyoshi Hayase (Okayama Prefectural Univ.)
pp. 19 - 24
VLD2006-144
On an Optimality of a Sampling Circuit for Liquid Crystal Displays
Shingo Takahashi, Shuji Tsukiyama (Chuo Univ.), Masanori Hashimoto (Osaka Univ.), Isao Shirakawa (University of Hyogo)
pp. 25 - 30
VLD2006-145
A Consideration of MPEG-A Photo Player Meta-data Generation System Design with Hardware Acceleration for Mobile Devices
Masato Motohashi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)
pp. 31 - 36
VLD2006-146
[Invited Talk]
System LSI Architecture for Embedded Applications in Multi-Core era
Naohiko Irie (Hitachi, CRL)
p. 37
VLD2006-147
An Object Oriented System LSI Design Method Using Java Language
Seigo Masuoka, Hiroyuki Terai, Manabu Koyama (Kinki Univ.), Kazuhiko Nakahara (Spansion Japan), Akihisa Yamada (Sharp), Takashi Kambe (Kinki Univ.)
pp. 39 - 44
VLD2006-148
A method to evaluate logic function by using decision diagram with memory packing.
Hiroyuki Tanaka, Hiroki Nakahara, Munehiro Matsuura, Tsutomu Sasao (KIT)
pp. 45 - 50
VLD2006-149
Ｄesign Method of High Density System LSI with Three-Dimensional Transistor (FinFET)
-- Pattern Area Reduction of System LSI --
Shigeyoshi Watanabe, Keisuke Okamoto, Makoto Oya (Shonan Institute of Tech.)
pp. 51 - 56
VLD2006-150
A Study of Performance Evaluation on Globally Asynchronous Locally Synchronous Systems
Kazuyuki Tashiro, Tomoyuki Yokogawa (Okayama Prefectural Univ.), Isao Kayano (Kawasaki College of Allied Health Professions), Yoichiro Sato, Michiyoshi Hayase (Okayama Prefectural Univ.)
pp. 57 - 62
VLD2006-151
A behavioral power modeling algorithm which considers area speed tradeoff
Noriyuki Inoue, Masaaki Ohtsuki, Masahiro Fukui (Ritsumeikan Uni.)
pp. 63 - 68
VLD2006-152
An efficient battery modeling and optimization for battery driven systems
Sayaka Iwakoshi, Yu Chikayama, Masahiro Fukui (Ritsumeikan Univ.)
pp. 69 - 74
VLD2006-153
Design method of low-power dual-supply-voltage system LSI taking into account gate/subthreshold leakage current of MOSFET
Shigeyoshi Watanabe, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (Shonan Institute of Tech.)
pp. 75 - 80
VLD2006-154
Analysis for factors that affect power dissipation for Multiplier applying Run Time Power Gating
Seidai Takeda, Toshihiro Kashima, Toshiaki Shirai, Naoaki Ohkubo, Kimiyoshi Usami (S.I.T.)
pp. 81 - 85
VLD2006-155
Characteristic of Random Curved Surface and a Proposition of a New Curved Surface Model
-- An Universal Random Curved Surface Model Formed from Rotational Gaussians --
Shin-ichi Ohkawa, Hiroo Masuda (Renesas)
pp. 87 - 92
VLD2006-156
Statistical Delay Computation of Path-Based Timing Analysis Considering Inter and Intra-Chip Variations
Katsumi Homma, Izumi Nitta, Toshiyuki Shibuya (Fujitsu Labs.)
pp. 93 - 98
VLD2006-157
Sequence-Pair Based Compaction under Crosstalk Constraint
Tetsuya Tashiro, Takehiko Matsuo, Shigetoshi Nakatake (Univ. of Kitakyushu)
pp. 99 - 104
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.