Dr. Tadayoshi Enomoto received his Ph.D. from The Ohio State University in 1975. Beginning that same year, he joined NEC Central Research Laboratories, where he led as Chief Researcher, Section Chief, and Department Manager. He drove research and developed semiconductor integrated circuits (LSIs) and systems utilizing them. In 1992, he became a professor at the Faculty of Science and Engineering and the Graduate School of Chuo University, where he advanced research, development, and education in these fields. Since 2014, he has continued spearheading research and development as Professor Emeritus at Chuo University.

In preparation for the multimedia era centered on video and image communication, he has dedicated himself to the research and development of semiconductor LSI and system technology, which form the core of this field, and has achieved numerous pioneering accomplishments. To replace fixed-line telephones, which transmit and receive only voice, with mobile phones capable of transmitting and receiving video and images, he pioneered the development of a graphics processing unit (GPU) capable of encoding and decoding video and images in real time and successfully brought it to practical use. During the development process, he created a program-controlled system compatible with various standards and formats, as well as a new ultra-high-speed, multi-functional encoding circuit. Subsequently, he developed parallel and pipelined encoding methods, vector operation encoding methods, and ultra-high-speed subsampled motion vector detection methods, and successfully commercialized high-performance GPUs incorporating these technologies. The above technologies have become foundational for building the GPUs that are essential to today’s smartphones, personal computers, and televisions. Furthermore, he also realized destination-matching LSIs and word-search LSIs equipped with data search functions. The former led to the practical implementation of in-building LAN systems, while the latter paved the way for the commercialization of electronic dictionaries and translation devices. He also focused on reducing the power consumption and size of LSIs. By incorporating a newly developed low-power CMOS vector processing LSI, the world’s first air-cooled supercomputer was successfully commercialized. The invention of an ultra-compact on-chip CMOS power supply circuit consisting of two transistors enabled the realization of low-voltage, low-leakage-current SRAM and flip-flops. Through the invention of vertical interconnect formation technology connecting the front and back of a chip, the world’s first stacked three-dimensional LSI was realized. Currently, this technology is widely used in contactless IC card transit passes and other applications. The achievements described above have made a significant contribution to advancing semiconductor LSI and system technologies and to creating new markets.

He held numerous important positions, including Chair of the IEICE Technical Committee on Integrated Circuits, Chair of the Technical Committee on Electronic Devices, Editor-in-Chief of IEICE Transactions on Special Issues, Editorial Board Member of the IEEE Journal of Solid-State Circuits, Editorial Board Member of the IEEE Transactions on VLSI Systems, Member of the Japan International Prize Nomination Committee, Expert Committee Member of the Intellectual Property High Court, Researcher for Three-Dimensional Circuit Element Development at the Ministry of International Trade and Industry, and Head of the Department of Information Engineering, Faculty of Science and Engineering, Chuo University. In particular, as the first secretary and founding chair of the Technical Committee on Integrated Circuits, he nurtured the committee into one of IEICE's most active committees and developed the LSI and Systems Workshop into one of the leading conferences in Japan.

He has published numerous papers and patents presenting his research findings, earning high acclaim both in Japan and abroad. Furthermore, by publishing practical technical books (CMOS Integrated Circuits, Nano-CMOS Integrated Circuits, and Image LSI System Design Technology), he has contributed to advancing LSI technology while also nurturing many talented individuals for the industry. For these achievements, he has received numerous awards, including the IEICE Best Paper Award, the IEICE Achievement Award, the IEICE Distinguished Achievement and Contributions Award, the Telecommunications Advancement Foundation Award, the IEEE JSSC Best Paper Award, the IEEE ASP-DAC Best LSI Design Award, and the Ohio State University Fellowship. Furthermore, he has been elected an IEICE Fellow and an IEEE Life Fellow, and is internationally recognized as a leading Japanese researcher.

As described above, his contributions to the IEICE and to the advancement of electronic information and communications technology have been exceptionally significant. We hereby recommend him for the position of Honorary Member of the IEICE.