ken-system: Advance Program - 2017-05-RECONF-CPSY-DC-IPSJ-ARC

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Special Interest Group on System Architecture (IPSJ-ARC)

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Technical Committee on Computer Systems (CPSY)
Chair: Yasuhiko Nakashima (NAIST)
Vice Chair: Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Tokyo)
Secretary: Takashi Miyoshi (Fujitsu Labs.), Michihiro Koibuchi (NII)
Assistant: Takeshi Ohkawa (Utsunomiya Univ.), Shinya Takameda (Hokkaido Univ.)

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Technical Committee on Dependable Computing (DC)
Chair: Michiko Inoue (NAIST) Vice Chair: Satoshi Fukumoto (Tokyo Metropolitan Univ.)
Secretary: Masayoshi Yoshimura (Kyoto Sangyo Univ.), Haruhiko Kaneko (Tokyo Inst. of Tech.)

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Technical Committee on Reconfigurable Systems (RECONF)
Chair: Minoru Watanabe (Shizuoka Univ.)
Vice Chair: Masato Motomura (Hokkaido Univ.), Yuichiro Shibata (Nagasaki Univ.)
Secretary: Yoshiki Yamaguchi (Univ. of Tsukuba), Kazuya Tanigawa (Hiroshima City Univ.)
Assistant: Takefumi Miyoshi (e-trees.Japan), Yuuki Kobayashi (NEC)

DATE:
Mon, May 22, 2017 14:00 - 18:10
Tue, May 23, 2017 09:00 - 18:10
Wed, May 24, 2017 09:00 - 12:30

PLACE:
Noboribetsu-Onsen Dai-ichi-Takimoto-Kan(55, Noboribetsu-Onsencho, Noboribetsu, Hokkaido, 059-0551. 1h10min from Shin-Chitose Airport by the direct bus, or 15min from JR Noboribetsu Station by a bus or taxi. http://www.takimotokan.co.jp/english/access/)

TOPICS:
HotSPA2017: Reconfigurable System, Dependable Computing System, and General Topics

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Mon, May 22 PM Neural Network Accelerator (14:00 - 15:00)
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(1)/RECONF 14:00 - 14:20
(See Japanese page.)

(2)/RECONF 14:20 - 14:40
(See Japanese page.)

(3)/RECONF 14:40 - 15:00
(See Japanese page.)

----- Break ( 10 min. ) -----

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Mon, May 22 PM Invited Talk 1 (15:10 - 15:50)
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(4) 15:10 - 15:50
(See Japanese page.)

----- Break ( 10 min. ) -----

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Mon, May 22 PM Neural Network Application on FPGAs (16:00 - 17:00)
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(5)/RECONF 16:00 - 16:20
(See Japanese page.)

(6)/RECONF 16:20 - 16:40
CNN implementation on FPGA with Power of 2 Approximation of Weight
Takahiro Utsunomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)

(7)/RECONF 16:40 - 17:00
(See Japanese page.)

----- Break ( 10 min. ) -----

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Mon, May 22 PM Reconfigurable LSI (17:10 - 18:10)
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(8)/RECONF 17:10 - 17:30
A proposal of Bit Serial Arithmetic Units for Arbitrary Precision
Tomonori Miura, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)

(9)/RECONF 17:30 - 17:50
Radiation tolerance of a holographic memory for optically reconfigurable gate arrays
Yoshizumi Ito, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.)

(10)/RECONF 17:50 - 18:10
(See Japanese page.)

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Tue, May 23 AM Image Processing Application on FPGAs (09:00 - 10:00)
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(11)/RECONF 09:00 - 09:20
(See Japanese page.)

(12)/RECONF 09:20 - 09:40

Keisuke Takano, Akira Uejima, Ryo Ozaki, Masaki Kohata (Okayama Univ. of Science)

(13)/RECONF 09:40 - 10:00
(See Japanese page.)

----- Break ( 15 min. ) -----

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Tue, May 23 AM Algorithm and Reconfigurable Device (10:15 - 11:15)
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(14)/RECONF 10:15 - 10:35
(See Japanese page.)

(15)/RECONF 10:35 - 10:55
(See Japanese page.)

(16)/RECONF 10:55 - 11:15
Power Optimization for Pipelined CGRA with Intger Linear Program
Takuya Kojima, Naoki Ando, Hayate Okuhara, Ng.Doan Anh Vu, Hideharu Amano (Keio Univ.)

----- Break ( 15 min. ) -----

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Tue, May 23 AM FPGA Application and Acceleration System (11:30 - 12:30)
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(17)/RECONF 11:30 - 11:50
(See Japanese page.)

(18)/RECONF 11:50 - 12:10
(See Japanese page.)

(19)/RECONF 12:10 - 12:30
FPGA and DPDK-Based Communication Acceleration Methods for Parameter Servers
Kazumasa Kishiki, Korechika Tamura, Hiroki Matsutani (Keio Univ.)

----- Break ( 90 min. ) -----

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Tue, May 23 PM Light Application (14:00 - 15:00)
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(20)/RECONF 14:00 - 14:20
(See Japanese page.)

(21)/CPSY 14:20 - 14:40
A Compact Low-Latency Systematic Successive Cancellation Polar Decoder for Visible Light Communication Systems
Duc Phuc Nguyen, Dinh Dung Le, Thi Hong Tran, Takashi Nakada, Yasuhiko Nakashima (NAIST)

(22)/CPSY 14:40 - 15:00
A prototype of Dimmable Visible Light Communication System on FPGA
Dinh Dung Le, Duc Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima (NAIST), Son Kiet Nguyen, Huu Thuan Huynh (HCMUS)

----- Break ( 10 min. ) -----

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Tue, May 23 PM Invited Talk 2 (15:10 - 15:50)
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(23) 15:10 - 15:50
(See Japanese page.)

----- Break ( 10 min. ) -----

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Tue, May 23 PM Bud Flush Architecture (16:00 - 17:00)
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(24)/CPSY 16:00 - 16:20
(See Japanese page.)

(25)/CPSY 16:20 - 16:40

Hisakazu Fukuoka, Ryusuke Yamano, Yasuhiko Nakashima (NAIST)

(26)/CPSY 16:40 - 17:00

()

----- Break ( 10 min. ) -----

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Tue, May 23 PM Algorithm (17:10 - 18:10)
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(27)/CPSY 17:10 - 17:30
A Case for HTM-supported Concurrent B-trees
Kousei Sai, Jun Miyazaki (Tokyo Inst. of Tech.)

(28)/CPSY 17:30 - 17:50
(See Japanese page.)

(29)/CPSY 17:50 - 18:10
Optimization of the aggregation process in Particle-In-Cell method using OpenCL
Hiroyuki Noda, Ryotaro Sakai (Keio Univ.), Takaaki Miyajima, Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.)

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Wed, May 24 AM Distributed System (09:00 - 10:00)
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(30)/CPSY 09:00 - 09:20
Deduplication Estimation System for Large Scale Enterprise Storage
Kazuei Hironaka, Tomohiro Kawaguchi (Hitachi)

(31) 09:20 - 09:40
パケット処理キャッシュにおける送信元IPアドレスに着目したミス削減手法に関する初期検討
○八巻隼人、愛甲達也、三輪忍、本多弘樹（電気通信大学）

(32)/CPSY 09:40 - 10:00
A Concept for Distributed Neural Network on Edge Computing
Yuria Hiraga, Takamasa Mitani, Hisakazu Fukuoka, Takashi Nakada, Yasuhiko Nakashima (NAIST)

----- Break ( 15 min. ) -----

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Wed, May 24 AM Dependable Computing (10:15 - 11:15)
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(33)/DC 10:15 - 10:35
Deterministic Path Delay Measurement Using Short Cycle Test Pattern for Aging Detection
Kentaro Kato, Umi Mori (NIT)

(34)/DC 10:35 - 10:55
On Implementation of the Light-Weight MPAR protocol in NS2
Yusuke Sugiura, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.)

(35)/DC 10:55 - 11:15
Study on Application System Anomaly Detection Method Based on Correlation Analysis of Communication Packets Sampling
Masahiko Yasui, Masayuki Sakata, Keisuke Hatasaki, Keitaro Uehara, Takaya Ide, Hitoshi Yabusaki (Hitachi)

----- Break ( 15 min. ) -----

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Wed, May 24 AM Microarchitecture (11:30 - 12:30)
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(36) 11:30 - 11:50
低電力モードを備えるプロセッサとモード切り替えアルゴリズムによる電力効率の向上
○塩谷亮太、地代康政、出岡宏二郎（名古屋大学）、五島正裕（国立情報学研究所）、安藤秀樹（名古屋大学）

(37) 11:50 - 12:10
動的タイム・ボローイングを可能にするクロッキング方式のスカラ・プロセッサへの適用
○神保潮（総合研究大学院大学）、五島正裕（国立情報学研究所）

(38)/DC 12:10 - 12:30
Note on Evaluation Scheme for Redundant CPU Cache Considering Soft Error Resilience and Performance
Naoya Kawashima, Masayuki Arai (Nihon Univ.)

# Information for speakers
General Talk will have 15 minutes for presentation and 5 minutes for discussion.
Invited Talk will have 35 minutes for presentation and 5 minutes for discussion.

# CONFERENCE ANNOUNCEMENT:
- 22日研究会終了後RECONF研懇親会、23日研究会終了後HotSPA (CPSY/DC/RIS/ARC) 懇親会（両日ともに19:30開始）を予定しております。
- 本研究会は合宿形式となっており、会場の第一滝本館様のご好意により、参加者向けに大変リーズナブルなプランをご提供いただいております。申込〆切は4月14日です。
懇親会および宿泊の案内はこちら http://sigarc.ipsj.or.jp/hotspa2017-stay/
- 23日12:45からRECONF研専門委員会を予定しております。ご出席なさる場合には上記の宿泊申込システム中のフォームからご登録頂くか、またはRECONF研担当・本村 (motomura_at_ist_hokudai_ac_jp) までご連絡ください。

=== Special Interest Group on System Architecture (IPSJ-ARC) ===
# FUTURE SCHEDULE:

Wed, Jul 26, 2017 - Fri, Jul 28, 2017: Akita Atorion-Building (Akita) [Fri, Jun 2], Topics: Parallel, Distributed and Cooperative Processing

=== Technical Committee on Computer Systems (CPSY) ===
# FUTURE SCHEDULE:

Wed, Jul 26, 2017 - Fri, Jul 28, 2017: Akita Atorion-Building (Akita) [Fri, Jun 2], Topics: Parallel, Distributed and Cooperative Processing

# SECRETARY:
Takashi Miyoshi (FUJITSU)
TEL +81-44-754-2931, FAX +81-44-754-2672
E-mail:

CPSY WEB
http://www.ieice.or.jp/iss/cpsy/jpn/

=== Technical Committee on Dependable Computing (DC) ===
# FUTURE SCHEDULE:

Wed, Jul 26, 2017 - Fri, Jul 28, 2017: Akita Atorion-Building (Akita) [Fri, Jun 2], Topics: Parallel, Distributed and Cooperative Processing

=== Technical Committee on Reconfigurable Systems (RECONF) ===

# SECRETARY:
Tetsuo HIRONAKA
Hiroshima City University,
e-mail: