IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev VLD Conf / Next VLD Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 

===============================================
Technical Committee on VLSI Design Technologies (VLD)
Chair: Yusuke Matsunaga (Kyushu Univ.) Vice Chair: Takashi Takenana (NEC)
Secretary: Hiroyuki Tomiyama (Ritsumeikan Univ.), Daisuke Fukuda (Fujitsu Labs.)
Assistant: Ittetsu Taniguchi (Ritsumeikan Univ.)

===============================================
Technical Committee on Circuits and Systems (CAS)
Chair: Satoshi Tanaka (Murata) Vice Chair: Toshihiko Takahashi (Niigata Univ.)
Secretary: Taizou Yamawaki (Hitachi), Shunsuke Koshita (Tohoku Univ.)
Assistant: Toshihiro Tachibana (Shonan Inst. of Tech.), Yohei Nakamura (Hitachi)

===============================================
Technical Committee on Signal Processing (SIP)
Chair: Osamu Houshuyama (NEC)
Vice Chair: Makoto Nakashizuka (Chiba Inst. of Tech.), Masahiro Okuda (Univ. of Kitakyushu)
Secretary: Masanori Tsujikawa (NEC), Akira Hirabayashi (Ritsumeikan Univ.)
Assistant: Takamichi Miyata (Chiba Inst. of Tech.)

===============================================
Technical Committee on Mathematical Systems Science and its applications (MSS)
Chair: Satoshi Yamane (Kanazawa Univ.) Vice Chair: Morikazu Nakamura (Univ. of Ryukyus)
Secretary: Mitsuru Nakata (Yamaguchi Univ.), Ichiro Toyoshima (Toshiba)
Assistant: Hideki Kinjo (Okinawa Univ.)

DATE:
Wed, Jun 17, 2015 09:20 - 17:50
Thu, Jun 18, 2015 09:20 - 12:25

PLACE:
(Associate Prof. Kazuya HARAGUCHI)

TOPICS:
System, signal processing and related topics

----------------------------------------
Wed, Jun 17 AM (09:20 - 10:35)
----------------------------------------

(1) 09:20 - 09:45
Design of Probabilistic Boolean Networks Based on Network Structure and Steady-state Probabilities
Koichi Kobayashi (Hokkaido Univ.), Kunihiko Hiraishi (JAIST)

(2) 09:45 - 10:10
Choreography Realization by Re-constructible Decomposition of Acyclic Relations
Toshiyuki Miyamoto (Osaka Univ.)

(3) 10:10 - 10:35
Stability of Matching on Stable Matching Problem with Multicriteria Preference List
Hideki Kinjo (Okinawa Univ.), Morikazu Nakamura (Univ. of the Ryukyus)

----- Break ( 10 min. ) -----

----------------------------------------
Wed, Jun 17 AM (10:45 - 12:00)
----------------------------------------

(4) 10:45 - 11:10
Extension of One-Instruction-Set Computer and Its Evaluation
Noriaki Sakamoto, Tanvir Ahmed (Tokyo Tech), Jason H. Anderson (Univ. of Toronto), Yuko Hara-Azumi (Tokyo Tech)

(5) 11:10 - 11:35
Accelerating techniques for test pattern compaction for large circuits
Yusuke Matsunaga (Kyushu Univ.)

(6) 11:35 - 12:00
A Case Study of Symbolic Model Checking of Large Scale Hardware IP
Yuta Morimitsu, Tomoyuki Yokogawa (Okayama Pref. Univ.), Masafumi Kondo, Hisashi Miyazaki (Kawasaki Univ. of Medical Welfare), Yoichiro Sato, Kazutami Arimoto (Okayama Pref. Univ.)

----- Lunch Break ( 80 min. ) -----

----------------------------------------
Wed, Jun 17 PM (13:20 - 15:00)
----------------------------------------

(7) 13:20 - 13:45
On the Complexity of Mining Maximal Frequent Subgraphs
Satoshi Tayu, Shuni Go, Shuichi Ueno (Tokyo Tech)

(8) 13:45 - 14:10
The characteristic of routes selected by degree centrality-aware distance vector routing
Yoshihiro Kaneko (Gifu Univ.)

(9) 14:10 - 14:35
The difference in profit allocation of participants in deregulated electricity markets
Ryo Hase, Norihiko Shinomiya (Soka Univ.)

(10) 14:35 - 15:00
Constrained vector fitting and its application to filter characteristics approximation
Toshiki Matsubara, Toshikazu Sekine, Yasuhiro Takahashi (Gifu Univ.)

----- Break ( 15 min. ) -----

----------------------------------------
Wed, Jun 17 PM (15:15 - 16:05)
----------------------------------------

(11) 15:15 - 16:05
[Invited Lecture]
A consideration on a pseudo-positive real function
Tetsuo Nishi (Kyushu Univ.)

----- Break ( 15 min. ) -----

----------------------------------------
Wed, Jun 17 PM (16:20 - 17:50)
----------------------------------------

(12) 16:20 - 17:50
[Panel Discussion]
The Role of System and Signal Processing Subsociety
-- Society Activity and Job Search --
Atsushi Takahashi (Tokyo Tech), Yoshihiro Kaneko (Gifu Univ.), Yusuke Matsunaga (Kyushu Univ.), Osamu Hoshuyama, Yuichi Nakamura (NEC)

----------------------------------------
Thu, Jun 18 AM (09:20 - 10:35)
----------------------------------------

(13) 09:20 - 09:45
Stabilization of Nonequilibrium Target State in Population Games Using Capitation Tax and Subsidy
Masaya Kinoshita, Takafumi Kanazawa (Osaka Univ.)

(14) 09:45 - 10:10
Multipopulation Game Dynamics Generated by Population-Independent Pairwise Proportional Imitation
Manao Machida, Takafumi Kanazawa (Osaka Univ.)

(15) 10:10 - 10:35
Software model checking of embedded assembly programs by symbolic execution
Ryosuke Konoshita, Satoshi Yamane (Kanazawa Univ.)

----- Break ( 10 min. ) -----

----------------------------------------
Thu, Jun 18 AM (10:45 - 12:25)
----------------------------------------

(16) 10:45 - 11:10
Multi-channel Feedforward ANC System Using Microphone Arrays for Noise Source Separation
Satoshi Kinoshita, Yoshinobu Kajikawa (Kansai Univ.)

(17) 11:10 - 11:35
Non-Frequency-Overlapping Dual-Sweep Waveform for De-Ramp Processing in FM Continuous Wave Radar
Osamu Hoshuyama, Minoru Kobayashi, Masafumi Emura (NEC)

(18) 11:35 - 12:00
A design method of the Low Delay Band-Pass Maximally Flat FIR Digital Differentiators
Takashi Yoshida, Naoyuki Aikawa (Tokyo Univ. of Science)

(19) 12:00 - 12:25
Compensation of Nonlinear Distortions for Parametric Array Loudspeakers
-- In the case of changing the amplitude of input signal --
Yuta Hatano, Satoshi Kinoshita, Chuang Shi, Yoshinobu Kajikawa (Kansai Univ.)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.
Invited Talk will have 40 minutes for presentation and 10 minutes for discussion.

# CONFERENCE SPONSORS:
- This conference is co-sponsored by IEEE Signal Processing Society Japan Chapter. This conference is technical co-sponsored by IEEE Circuits and Systems Society Japan Chapter(IEEE CASS JC).


=== Technical Committee on VLSI Design Technologies (VLD) ===
# FUTURE SCHEDULE:

Mon, Aug 10, 2015 - Tue, Aug 11, 2015: Ho Chi Minh city University of Sciences (HCMUS) [Tue, Jun 30], Topics: The 6th International Conference on Integrated Circuits, Design, and Verification (ICDV 2015)

# SECRETARY:
Hiroyuki Tomiyama (Ritsumeikan University)
E-mail: htfci
Tel: 077-561-4928

# ANNOUNCEMENT:
# See also VLD's homepage:
http://www.ieice.org/~vld/

=== Technical Committee on Circuits and Systems (CAS) ===

# SECRETARY:
Norihiko Shinomiya (Soka University)
TEL: 042-691-9400
E-mail:

=== Technical Committee on Signal Processing (SIP) ===
# FUTURE SCHEDULE:

Wed, Aug 19, 2015 - Thu, Aug 20, 2015: National Institute of informatics [Tue, Jun 16]

# SECRETARY:
Masanori Tsujikawa (NEC Corp.)
Email: tucbc

=== Technical Committee on Mathematical Systems Science and its applications (MSS) ===

# SECRETARY:
Mitsuru Nakata (Yamaguchi Univ.)
Tel: +81-83-933-5402
E-mail: mgu-u


Last modified: 2015-06-16 09:25:02


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to CAS Schedule Page]   /   [Return to VLD Schedule Page]   /   [Return to SIP Schedule Page]   /   [Return to MSS Schedule Page]   /  
 
 Go Top  Go Back   Prev VLD Conf / Next VLD Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan