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Technical Committee on Circuits and Systems (CAS)
Chair: Satoshi Tanaka (Murata) Vice Chair: Toshihiko Takahashi (Niigata Univ.)
Secretary: Taizou Yamawaki (Hitachi), Shunsuke Koshita (Tohoku Univ.)
Assistant: Toshihiro Tachibana (Shonan Inst. of Tech.), Yohei Nakamura (Hitachi)

DATE:
Thu, Jan 28, 2016 11:00 - 16:40
Fri, Jan 29, 2016 10:00 - 14:50

PLACE:
Kikai-Shinko-Kaikan Bldg.(http://www.jspmi.or.jp/english/about/access.html)

TOPICS:


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Thu, Jan 28 AM (11:00 - 12:15)
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(1) 11:00 - 11:25
Multiple omnidirectional sound source tracking using circular microphone array
Yusuke Shiiki, Kenji Suyama (Tokyo Denki Univ.)

(2) 11:25 - 11:50
Design of IIR Filters Using PSO Adjusting An Additional Range of Penalty Function
Kenzo Yamamoto, Kenji Suyama (Tokyo Denki Univ.)

(3) 11:50 - 12:15
Design of IIR Filters with Constraints Using PSO
Haruna Aimi, Kenji Suyama (Tokyo Denki Univ.)

----- Lunch Break ( 75 min. ) -----

----------------------------------------
Thu, Jan 28 PM (13:30 - 14:30)
----------------------------------------

(4) 13:30 - 13:50
Design of CSD Coefficient FIR Filters Using GA with Promoting Diversification
Yuto Arie, Kenji Suyama (Tokyo Denki Univ)

(5) 13:50 - 14:10
Multiple Sound Source Tracking Using Multiplication of Evaluation Function
Katsuya Nakazawa, Kenji Suyama (Tokyo Denki Univ.)

(6) 14:10 - 14:30
Sound Source Localization based on Identification of Transfer Function between Microphones
Yuta Izumi, Kenji Suyama (Tokyo Denki Univ.)

----- Break ( 15 min. ) -----

----------------------------------------
Thu, Jan 28 PM (14:45 - 15:35)
----------------------------------------

(7) 14:45 - 15:10
Fault Analysis Attack for a Lightweight Block Cipher Simeck
Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)

(8) 15:10 - 15:35
Fault Analysis Attack for Piccolo-OTR
Kohei Nohara, Masaya Yoshikawa (Meijo Univ.)

----- Break ( 15 min. ) -----

----------------------------------------
Thu, Jan 28 PM (15:50 - 16:40)
----------------------------------------

(9) 15:50 - 16:15
Evaluation of Physical Unclonable Function with Noise on FPGA
Hiroki Murase, Masaya Yoshikawa (Meijo Univ.)

(10) 16:15 - 16:40
Quantitative Evaluation of Tamper Resistance for Random Number Masking
Ryoma Matsuhisa, Masaya Yoshikawa (Meijo Univ.)



----------------------------------------
Fri, Jan 29 AM (10:00 - 11:15)
----------------------------------------

(11) 10:00 - 10:25
Power interchange modeling using multi-agent system
Kentaro Tani (Grad. Inst. Entrepreneurial Studies), Yoshinobu Maeda, Keisuke Nakano (Niigata Univ.), Hideho Numata, Masakazu Sengoku (Grad. Inst. Entrepreneurial Studies)

(12) 10:25 - 10:50
On a piecewise linear enclosure of a continuous function of many variables
-- Error bounds of numerical convolution --
Hideaki Okazaki, Shunsuke Otsuka, Hideo Nakano (SIT)

(13) 10:50 - 11:15
A construction of a quadcopter by using a student embedded device
Kaito Isogai, Ryo Inohara, Hideo Nakano, Hideaki Okazaki (SIT)

----- Break ( 15 min. ) -----

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Fri, Jan 29 AM (11:30 - 12:20)
----------------------------------------

(14) 11:30 - 11:55
Behavior changes of mobile nodes and performance evaluation in information floating
Keisuke Nakano, Kazuyuki Miyakita (Niigata Univ.)

(15) 11:55 - 12:20
Reproduction of Quadrupedal Gait Patterns Using a Coupled Hardware Nonlinear Oscillators
Satoshi Oyake, Akihiro Maruyama (Niigata Univ), Taishin Nomura (Osaka Univ), Yoshinobu Maeda (Niigata Univ)

----- Lunch Break ( 70 min. ) -----

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Fri, Jan 29 PM (13:30 - 14:50)
----------------------------------------

(16) 13:30 - 13:50
On Education Materials of Systems and Control for an Active Engineering Learning
Hideaki Okazaki, Kaito Isogai (SIT)

(17) 13:50 - 14:10
A bivariate fractal interpolation surface, and its application
Shota Ueno, Hideo Nakano, Hideaki Okazaki (SIT)

(18) 14:10 - 14:30
Basic Study for the effect of product lifespan on markets using multi-agent simulation
Shun Onodera (Niigata Univ.), Nao Ito (Toyama Collage), Maeda Yoshinobu (Niigata Univ.)

(19) 14:30 - 14:50
The development of a UAV control system by using a two-dimensional code
Saki Tanabe, Yoshinobu Maeda, Koichiro Enomoto, Keisuke Nakano, Tatsuya Yamazaki (Niigata Univ.)


# CONFERENCE SPONSORS:
- This conference is technical co-sponsored by IEEE Circuits and Systems Society Japan Chapter(IEEE CASS JC).


=== Technical Committee on Circuits and Systems (CAS) ===
# FUTURE SCHEDULE:

Thu, Feb 25, 2016 - Fri, Feb 26, 2016: Laforet Nanki-Shirahama Hotel [Tue, Dec 8], Topics: Network Processor, Signal Processing Circuits for Communication, Wireless LAN/PAN, etc.

# SECRETARY:
Taizo Yamawaki(Hitachi Ltd.)
TEL: 042-323-1111
E-mail: izowe


Last modified: 2015-12-30 13:22:07


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