Wed, May 18 PM 14:15 - 15:30 |
(1) VLD |
14:15-14:40 |
Study of the slew-rate contorol system for reducing far-end crosstalk |
Kazunori Nakashima, Suguru Kato, Shinichi Sasaki (Saga Univ) |
(2) VLD |
14:40-15:05 |
An Effective Overlap Removable Objective for Analytical Placement |
Syota Kuwabara, Yukihide Kohira (Univ. of Aizu), Yasuhiro Takashima (Univ. of Kitakyushu) |
(3) VLD |
15:05-15:30 |
Path Encoding Method for High Speed Frequency-Mapping Associative Memory |
Seiryu Sasaki, Masahiro Yasuda, Akio Kawabata, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) |
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15:30-15:45 |
Break ( 15 min. ) |
Wed, May 18 PM 15:45 - 16:45 |
(4) VLD |
15:45-16:45 |
[Invited Talk]
Recent Gating-Techniques for Power Reduction |
Kimiyoshi Usami (Shibaura Inst. of Tech.) |
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16:45-16:50 |
Break ( 5 min. ) |
Wed, May 18 PM 16:50 - 17:50 |
(5) VLD |
16:50-17:50 |
[Invited Talk]
Low Power Design Technology on Algorithm/Architecture Level for Video Processing |
Satoshi Goto (Waseda Univ.) |
Thu, May 19 AM 09:30 - 10:45 |
(6) VLD |
09:30-09:55 |
Super-resolution by UsingWeighted Adders with Selector Logics |
Hiromine Yoshihara, Masao Yanagisawa, Tatsuo Ohtsuki, Nozomu Togawa (Waseda Univ.) |
(7) VLD |
09:55-10:20 |
Multi-Stage Power Gating Based on Controlling Values of Logic Gates |
Jin Yu, Shinji Kimura (Waseda Univ.) |
(8) |
10:20-10:45 |
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10:45-10:55 |
Break ( 10 min. ) |
Thu, May 19 AM 10:55 - 12:10 |
(9) |
10:55-11:20 |
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(10) |
11:20-11:45 |
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(11) |
11:45-12:10 |
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12:10-13:20 |
Lunch Break ( 70 min. ) |
Thu, May 19 PM 13:20 - 14:35 |
(12) |
13:20-13:45 |
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(13) |
13:45-14:10 |
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(14) |
14:10-14:35 |
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