IEICE Technical Report

Online edition: ISSN 2432-6380

Volume 119, Number 429

Dependable Computing

Workshop Date : 2020-02-27 - 2020-02-28 / Issue Date : 2020-02-20

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Table of contents

DC2019-98
A Dynamic Optimization Platform for High-bandwidth Low-latency Approximate Networks
Shoichi Hirasawa, Michihiro Koibuchi (NII)
pp. 1 - 6

DC2019-99
Low-Latency Memory Packet Network Using Bypassing
Yoshiya Shikama, Ryuta Kawano, Akram Ben Ahmed, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
pp. 7 - 12

DC2019-100
Accelerating Change-Point Detection on Multiple Multidimensional Stream Data using FPGA NIC
Takuma Iwata, Hiroki Matsutani (Keio Univ.)
pp. 13 - 18

DC2019-101
Human Activity Outlier Detection Based on Online Sequential Learning for Time Series Prediction
Takuya Sakuma, Hiroki Matsutani (Keio Univ.)
pp. 35 - 40

DC2019-102
Toward acceleration of matrix multiplication on homomorphic encryption library
Tetsuya Makita, Teppei Shishido (Waseda Univ.), Yasutaka Wada (Meisei Univ.), Keiji Kimura (Waseda Univ.)
pp. 51 - 56

DC2019-103
An efficient traffic reduction scheme for mobile cooperative cache by pushing contents preliminarily.
Takayuki Shiroma (UEC), Masato Yoshimi (TIS), Celimuge Wu, Tsutomu Yoshinaga (UEC)
pp. 57 - 61

DC2019-104
Note on Dependable LoRa Transmission by Frequency and Gateway Multiplexing
Kohei Kudo, Kazuki Sasaki, Masayuki Arai (Nihon Univ.)
pp. 63 - 68

DC2019-105
(See Japanese page.)
pp. 69 - 74

DC2019-106
A Study on Checkpoint Data Saved in a Blockchain
Mamoru Ohara (TIRI)
pp. 75 - 80

DC2019-107
A Study of High-Performance and Low-Cost Erasure Coding Method for Tape Archive System
Shun Gokita, Masahisa Tamura, Yasuo Noguchi (Fujitsu Lab.)
pp. 81 - 86

DC2019-108
NDCKPT: Transparent Checkpointing on NVDIMM with Operating System Support
Hikaru Nishida, Keiji Kimura (Waseda Univ.)
pp. 87 - 92

DC2019-109

Takuya Kojima, Takeharu Ikezoe, Hideharu Amano (Keio Univ.)
pp. 93 - 98

DC2019-110
HLS by multi-objective optimization under resource constraints -- Approach to extracting coarse-grained parallelism using functional language --
Fukuhei Hamazaki, Tetsuro Yamazaki, Ryota Shioya (U-Tokyo), Kenichi Koizumi, Hiroshi Tezuka, Mary Inaba (U-Tokyo)
pp. 99 - 104

DC2019-111
Implementation and Evaluation of Out-of-Order STRAIGHT Soft Processor
Satoshi Mitsuno, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai (Univ. of Tokyo)
pp. 105 - 110

DC2019-112
Special-purpose computer for electroholography using Xilinx Alveo U250
Yota Yamamoto (Chiba Univ.), Nobuyuki Masuda (Tokyo Univ. of science), Tomoyoshi Shimobaba, Takashi Kakue, Tomoyoshi Ito (Chiba Univ.)
pp. 111 - 115

DC2019-113
Implementation of Video Traffic Inspection Removal on Snort
Masanori Yuno, Hayato Yamaki, Shinobu Miwa, Hiroki Honda (UEC)
pp. 125 - 130

DC2019-114
Improving Utilization Efficiency of Caches on DPI Devices for High-speed GZIP Decomposition
Yusuke Kurokawa, Hayato Yamaki, Shinobu Miwa, Hiroki Honda (UEC)
pp. 131 - 136

DC2019-115
Construction and Evaluation of Software Development Environment for CGRA using LLVM
Ayaka Ohwada, Takuya Kojima, Hideharu Amano (Keio Univ.)
pp. 145 - 150

DC2019-116
Extension of OSCAR Compiler for Parallelizing C++ Programs
Tohma Kawasumi, Tilman Priesner, Masato Noguchi, Jixin Han, Hiroki Mikami (Waseda Univ.), Akihiro Kawashima, Keishiro Tanaka (OscarTechnology Corp.), Keiji Kimura, Hironori Kasahara (Waseda Univ.)
pp. 151 - 156

DC2019-117
Design and Post-layout Simulation Verification of PLA Reconfigurable Decoder with General-purpose Logic Switch
Daiki Ishikawa, Nobuyuki Yahiro, Shigetoshi Nakatake (Univ. of Kitakyusyu)
pp. 171 - 176

DC2019-118
DAC-based Multiplier in Analog-digital Mixed-signal Perceptron Circuit
Jinichiro Noguchi, Shigetoshi Nakatake (Univ. of Kitakyushu)
pp. 177 - 181

DC2019-119
Real-time Tasks Management with the Context Cache on RMT Processor
Shogo Iyota, Atsushi Santo, Yuki Mori, Nobuyuki Yamasaki (Keio Univ)
pp. 183 - 188

DC2019-120
A Resource Reservation Unit for Real-Time for SMT Processors
Atsushi Santo, Masahiko Takahashi, Nao Sugiyama, Yosuke Ide, Nobuyuki Yamasaki (Keio Univ)
pp. 189 - 194

DC2019-121
Space Responsive Multithreaded Processor (SRMTP) for Spacecraft Control
nakabeppu shota, ide yosuke, suzuki hiromi, shishido haruki, takahashi masahiko, yamasaki nobuyuki (Keio Univ)
pp. 217 - 222

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan