IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 118, Number 340

Reconfigurable Systems

Workshop Date : 2018-12-05 - 2018-12-07 / Issue Date : 2018-11-28

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Table of contents

RECONF2018-34
Development of Software/Hardware Cooperative System for Radiosity Method using High-Level Synthesis with an FPGA
Kotaro Tamura, Tetsu Narumi (UEC univ.)
pp. 1 - 6

RECONF2018-35
An FPGA implementation of Tri-state YOLOv2 using Intel OpenCL
Youki Sada, Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara (titech)
pp. 7 - 12

RECONF2018-36
[Keynote Address]
Hiroki Nakahara (Titech)
p. 13

RECONF2018-37
Resources Utilization of Fine-grained Overlay Architecture
Theingi Myint (Kumamoto), Qian Zhao (Kyutech), Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto)
pp. 15 - 20

RECONF2018-38
Transparent Acceleration Method for Network Function Virtualization Using FPGA
Yoshikazu Watanabe, Yuki Kobayashi, Takashi Takenaka, Baba Hiroshi (NEC)
pp. 21 - 26

RECONF2018-39
An Evaluation of Acceleration Framework to Exploit TCAM implemented on FPGA
Takefumi Miyoshi (WasaLab/e-trees.Japan), Satoshi Funada (e-trees.Japan)
pp. 27 - 31

RECONF2018-40
Multi-FPGA implementation of deep learning applications
Kazusa Musha, Akram Ben Ahmed (Keio Univ.), Kudoh Tomohiro (Univ. of Tokyo), Hideharu Amano (Keio Univ.)
pp. 33 - 38

RECONF2018-41
A Tiny Memory implementation on an FPGA using Feature-Map Separable Convolution Technique
Akira Jinguji, Simpei Sato, Hiroki Nakahara (titech)
pp. 39 - 44

RECONF2018-42
Hardware implementation of ECG signals outlier detector trained by Sparse Robust Deep Autoencoder
Naoto Soga, Shimpei Sato, Hiroki Nakahara (Titech)
pp. 45 - 50

RECONF2018-43
Triple modular redundancy optically reconfigurable gate array
Toru Yoshinaga, Minoru Watanabe (Shizuoka Univ.)
pp. 51 - 54

RECONF2018-44
FPGA implementation of a robot control algorithm
Yusuke Takaki, Minoru Watanabe (Shizuoka Univ.), Kentaro Sano (Riken)
pp. 55 - 60

RECONF2018-45
[Keynote Address] AI in medical imaging diagnosis
Hiroshi Fujita (Gifu Univ.)
p. 61

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan