IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 117, Number 290

Silicon Device and Materials

Workshop Date : 2017-11-09 - 2017-11-10 / Issue Date : 2017-11-02

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Table of contents

SDM2017-61
[Invited Talk] Multri-Physics Simulation of GaN MOVPE Growth
Kenji Shiraishi, Kazuki Sekiguchi, Kenta Chokawa, Hiroki Shirakawa, Kento Kawakami, Yoshihiro Yamamoto, Masaaki Araidai, Naoya Okamoto, Katsumori Yoshimatsu (Nagoya Univ.), Yoshihiro Kangawa, Koichi Kakimoto (Kyushu Univ.)
pp. 1 - 4

SDM2017-62
[Invited Talk] SISPAD 2017 Review (1)
Akira Hiroki (Kyoto Inst. Tech.)
pp. 5 - 10

SDM2017-63
Simple and efficient approach to improve hot carrier immunity of a p-LDMOSFET
Atsushi Sakai, Katsumi Eikyu (REL), Fujii Hiroki, Takahiro Mori (RSMC), Yutaka Akiyama, Yasuo Yamaguchi (REL)
pp. 11 - 14

SDM2017-64
[Invited Talk] Impurity Diffusion Modeling in SiC
Masashi Uematsu (Keio Univ.)
pp. 15 - 20

SDM2017-65
[Invited Talk] Characterization and modeling of SiC power MOSFET
Takashi Sato, Kazuki Oishi, Masayuki Hiromoto (Kyoto Univ.), Michihiro Shintani (NAIST)
pp. 21 - 26

SDM2017-66
[Invited Talk] GaN MOS capacitance simulation considering deep traps
Koichi Fukuda, Hidehiro Asai, Junichi Hattori, Mitsuaki Shimizu (AIST), Tamotsu Hashizume (Hokkaido Univ.)
pp. 27 - 32

SDM2017-67
[Invited Talk] SISPAD 2017 Review (2)
Takashi Kurusu (TMC)
pp. 33 - 36

SDM2017-68
[Invited Talk] Fundamental Aspects of Semiconductor Device Modeling associated with Discrete Impurities -- Random Dopant Fluctuations and Self-Averaging --
Nobuyuki Sano (Univ. Tsukuba)
pp. 37 - 42

SDM2017-69
[Invited Talk] Quantum Transport Simulation of Ultra-Small Transistors
Nobuya Mori, Gennady Mil'nikov (Osaka Univ), Junichi Iwata, Atsushi Oshiyama (Univ of Tokyo)
pp. 43 - 46

SDM2017-70
[Invited Talk] An Accurate Metric to Control Time Step of Transient Device Simulation by Matrix Exponential Method
Shigetaka Kumashiro, Tatsuya Kamei, Akira Hiroki, Kazutoshi Kobayashi (KIT)
pp. 47 - 52

SDM2017-71
[Invited Talk] A SPICE-compatible SG-MONOS model for 28nm embedded flash macro design considering the parasitic resistance caused by trapped charges
Risho Koh, Mitsuru Miyamori, Katsumi Tsuneno, Tetsuya Muta, Yoshiyuki Kawashima (Renesas electronics)
pp. 53 - 58

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan