Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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CPSY2014-10
An FPGA-based Graph Processing Accelerator with PyCoRAM
Shinya Takamaeda-Yamazaki, Tadahiro Edamoto, Jun Yao, Yasuhiko Nakashima (NAIST)
pp. 1 - 6
CPSY2014-11
High Performance Graph Processing with a Memory Intensive Array Accelerator
Ryo Shimizu, Shinya Takamaeda Yamazaki, Jun Yao, Yasuhiko Nakashima (NAIST)
pp. 7 - 12
CPSY2014-12
An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA
Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.)
pp. 13 - 18
CPSY2014-13
Performance Evaluation of Hadoop Applications in Hybrid Cloud
Hayata Ohnaga (Tokyo Tech), Kento Aida (NII/Tokyo Tech), Omar Abdul-Rahman (NII)
pp. 19 - 24
CPSY2014-14
Fast Evaluation Method based on Static Code Analysis for Programs Derived by the Iterative Optimization on the Polyhedral Model
Tomoyuki Hosaka, Nobuhiko Sugino (Tokyo Inst. of Tech.)
pp. 25 - 30
CPSY2014-15
Auto Program Tuning for Improving Utilization of GPU Resources
Ryo Takeshima, Tomoaki Tsumura (Nagoya Inst. of Tech.)
pp. 31 - 36
CPSY2014-16
Performance Evaluation of Speculative Parallel Processing Utilizing Hardware Transactional Memory on Commercial Multi-core CPU
Yutaka Matsuno, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.)
pp. 37 - 42
CPSY2014-17
Verification Method of the Split Circuit by High-Level Synthesis Tool in a Circuit Partitioning mechanism
Kazuya Matsuda (TAT), Takefumi Miyoshi (e-trees.Japan), Masashi Takemoto (TAT), Satoshi Funada (e-trees.Japan), Hironori Nakajo (TAT)
pp. 43 - 48
CPSY2014-18
Design and Performance Evaluation of a Manycore Processor for Large FPGA
Haruka Mori, Kenji Kise (Tokyo Tech)
pp. 49 - 54
CPSY2014-19
A Study of Accelerated Image Processing of Stabilizing Navigational Image by HW/SW Cooperative Processing on an FPGA
Daichi Uetake, Takeshi Ohkawa (Utsunomiya Univ), Yohei Matsumoto (TUMSAT), Takashi Yokota, Kanemitsu Ootsu (Utsunomiya Univ)
pp. 55 - 60
CPSY2014-20
Interconnect Design for Low Latency, High Topological Embeddability and Partitioning Capability by Supplementary Optical Circuit Switches
Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII)
pp. 61 - 66
CPSY2014-21
TCP Protocol for 40Gbps Data Transfer
Fukumasa Morifuji, Kei Hiraki (Univ. of Tokyo)
pp. 67 - 72
CPSY2014-22
Alterable uniform and random NoC through rewiring
Seiichi Tade, Ryuta Kawano, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
pp. 73 - 78
CPSY2014-23
Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations
Akihiko Kasagi, Koji Nakano, Yasuaki Ito (Hiroshima Univ.)
pp. 79 - 84
CPSY2014-24
Cache Scheme Optimized to Access Behavior of Flash SSDs
Shugo Ogawa (NEC)
pp. 85 - 90
CPSY2014-25
Middlewares Utilizing The Characteristics of Resource Disaggregated Architecture
Masaki Kan, Jun Suzuki, Yuki Hayashi, Takashi Yoshikawa, Shinya Miyakawa (NEC)
pp. 91 - 96
CPSY2014-26
A preminarily evaluation on primitive data transfer performance of PEACH3
Hideharu Amano, Takuya Kuhara (Keio Univ.), Toshihiro Hanawa (Univ. of Tokyo), Yuetsu Kodama, Taisuke Boku (Univ. of Tsukuba)
pp. 97 - 102
CPSY2014-27
Consideration of 2D-FFT by Decomposition of Large Scale Data on Multi-GPU
Hiroaki Miyata, BoazJessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai, Takanobu Baba (Utsunomiya Univ.)
pp. 103 - 108
CPSY2014-28
Matrix Multiplication Library for Computation Acceralator with Limited Own Memory Size
Kiyotaka Atsumi (KA-LAB)
pp. 109 - 112
CPSY2014-29
GPU-based String Matching Method using Warp Shuffle Instructions for Nerwork Intrusion Detecion System on routere
Satoshi Koibuchi, Kazumasa Ikeuchi, Shinichi Ishida, Hiroaki Nishi (Keio Univ.)
pp. 113 - 118
CPSY2014-30
Anonymization Infrastructure for Privacy Preserving Data Publishing
Yuichi Nakamura, Kengo Okada, Fumito Yamaguchi, Hiroaki Nishi (Keio Univ.)
pp. 119 - 124
CPSY2014-31
Development of Cipher implementation tool using GUI
Masashi Watanabe, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa (NDA)
pp. 125 - 129
CPSY2014-32
An Implementation of Credibility-based Job Scheduling in Volunteer Computing Systems
Shun-ichiro Tani, Kan Watanabe (Okayama Univ.), Masaru Fukushi (Yamaguchi Univ.), Yasuyuki Nogami (Okayama Univ.)
pp. 131 - 136
CPSY2014-33
Instruction Execution Method towards Error Reduction of Neural Network Processing
Kazuma Koike, Shinya Takamaeda-Yamazaki, Jun Yao, Yasuhiko Nakashima (NAIST)
pp. 137 - 142
CPSY2014-34
Implementation of Wireless Connected Android Cluster Computer System Supporting Automatic Clustering
Yusuke Arai, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa (Utsunomiya Univ.)
pp. 143 - 148
CPSY2014-35
Method of Treating Read Operations' Trade-off between Throughput and Latency on Cyber-Physical Systems
Hiroshi Miyake, Junpei Kamimura, Dai Kobayashi (NEC)
pp. 149 - 154
CPSY2014-36
The Framework for Jointing Computation Center with User-Level Management System
Hideyuki Jitsumoto (Univ. of Tokyo), Taizo Kobayashi (Teikyo Univ.), Masaharu Matsumoto (Univ. of Tokyo), Shinichiro Takizawa (RIKEN), Shinichi Miura (Tokyo Inst. of Tech), Kengo Nakajima (Univ. of Tokyo)
pp. 155 - 159
CPSY2014-37
Dynamic Load Balancing for Realtime Detection Framework
Yusuke Koyanagi, Kenji Kobayashi, Tateki Imaoka, Masazumi Matsubara, Yoshinori Sakamoto (Fujitsu)
pp. 161 - 166
CPSY2014-38
GPU-Based Acceleration on Partitioned Graph Databases
Shin Morishima, Hiroki Matsutani (Keio Univ.)
pp. 167 - 172
CPSY2014-39
Improving Performance of Cassandra by Dynamic Control of Quorum Parameters
Toshiya Tanaka, Satoshi Fukuda, Ryota Kawashima, Shoichi Saito, Hiroshi Matsuo (Nagoya Inst. of Tech.)
pp. 173 - 178
CPSY2014-40
Spatiotemporal compression and hierarchization for low-power sensor networks
Takashi Nakada, Yukito Tanaka (Univ. of Tokyo), Keiro Muro (Hitachi), Takeo Murakami, Shintaro Fujisaki (Hitachi Information & Telecommunication Engineering), Takanori Shimura, Taizo Kinoshita (Hitachi), Hiroshi Nakamura (Univ. of Tokyo)
pp. 179 - 184
CPSY2014-41
The reality of Power Consumption with Different Computer Configurations and Workloads
Hisanobu Tomari, Kei Hiraki (Univ. of Tokyo)
pp. 185 - 190
CPSY2014-42
Coordinated Control of ICT and CRACs for Data Center Energy Saving via Mixed Integer Quadratic Programming
Hideaki Hashimoto, Keigo Matsuo, Kazuaki Chikira, Masayuki Nakamura, Joji Urata (NTT)
pp. 191 - 196
CPSY2014-43
Content-Aware Resolution Management and Auto-Parallelization for a Video Processing Library
Masahiro Mizuno, Takuya Matsunaga, Tomoaki Tsumura, Hiroshi Matsuo (Nagoya Inst. of Tech.)
pp. 197 - 202
CPSY2014-44
Implementation of Path Profiler for Enabling Analysis of Data Dependencies Between Program Execution Paths
Kazuki Ohshima, Kanemitsu Ootsu, Takanobu Baba, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.)
pp. 203 - 208
CPSY2014-45
Auto-scaling for low responsiveness of Node.js when handling CPU-bound tasks
Zhu Wang, Kei Hiraki (Univ. of Tokyo)
pp. 209 - 213
CPSY2014-46
Design of OpenCL Library and Execution Dispatcher for Embedded Accelerator
Ryuichi Sakamoto, Mikiko Sato (Tokyo Univ. of Agriculture and Tech. (TUAT)), Hideharu Amano, Tadahiro Kuroda (Keio Univ.), Kimiyoshi Usami (Shibaura Inst. of Tech.), Hiroshi Nakamura (Univ. of Tokyo), Mitaro Namiki (Tokyo Univ. of Agriculture and Tech. (TUAT))
pp. 215 - 220
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.