IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Reconfigurable Systems

Workshop Date : 2012-09-18 - 2012-09-19 / Issue Date : 2012-09-11

RECONF2012-24
FPGA-based video stabilisation
Toru Yabuki, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba)
pp. 1 - 6

RECONF2012-25
A development of trafic-sign recognition system by using vector processor Venice
Yoshiya Sugita, Tomoki Tomisawa, Masahiro Fukui (Ritsumeikan Univ.)
pp. 7 - 12

RECONF2012-26
JPEG encoder design improvement and its evaluation for Dynamic Reconfigurable Circuit
Hajime Sawano, Nobuyuki Araki, Takashi Kambe (Kinki Univ.)
pp. 13 - 18

RECONF2012-27
An approach for generating new timbres by the use of an FPGA
Suguru Ochiai, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba)
pp. 19 - 24

RECONF2012-28
An Implementation and Evaluation of SOC Estimation System for Lithium-ion Battery by PSoC
Masashi Fujimoto, Tatsuya Inoue, Lei Lin, Masahiro Fukui (Ritsumeikan Univ.)
pp. 25 - 30

RECONF2012-29
[Invited Talk] The LSI Design Methodology of Tamper Resistant Cryptographic Circuit
Takeshi Fujino, Mitsuru Shiozaki, Takaya Kubota (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyo Uiv.)
pp. 31 - 36

RECONF2012-30
Area-Efficeint Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs
Masanori Hariyama, Yoshiya Komatsu, Michitaka Kameyama (Tohoku Univ.)
pp. 37 - 42

RECONF2012-31
Architecture of an Asynchronous FPGA for Handshake-Component-Based Design
Masanori Hariyama, Yoshiya Komatsu, Michitaka Kameyama (Tohoku Univ.)
pp. 43 - 47

RECONF2012-32
An Area Minimized Logic Cluster using COGRE Logic Cell
Toshiya Takahashi, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 49 - 54

RECONF2012-33
Castle of Chips: A reconfigurable technique for multiple chips implementation
Hideharu Amano (Keio Univ.)
pp. 55 - 60

RECONF2012-34
Study of "fine-grain dynamic partial reconfiguration mechanism" on FPGA
Kunihiro Ueda, Naoki Kawamoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
pp. 61 - 66

RECONF2012-35
Superimposing configuration acceleration method of an optically reconfigurable gate array including a speed adjustment bit
Takashi Yoza, Minoru Watanabe (Shizuoka Univ.)
pp. 67 - 71

RECONF2012-36
Effects of Power Saving by Dynamic Partial Reconfiguration in Video Shape Detection Processing
Naoki Kawamoto, Kunihiro Ueda, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
pp. 73 - 78

RECONF2012-37
Fast Flaw Detection of Liquid Crystal Glass with a FPGA Board
Keisuke Matsuyama, Lin Meng, Yasuo Tenjo, Katsuhiro Yamazaki (Ritsumeikan Univ.)
pp. 79 - 84

RECONF2012-38
Gray-level image detection of a dynamically reconfigurable vision-chip architecture
Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito (Shizuoka Univ.)
pp. 85 - 88

RECONF2012-39
Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2-D FDTD Computation
Masanori Hariyama, Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Michitaka Kameyama (Tohoku Univ.)
pp. 89 - 93

RECONF2012-40
Prototyping Tightly-Coupled FPGA Cluster for Lattice Boltzmann Computation
Kentaro Sano, Yoshiaki Kono, Hayato Suzuki, Ryotaro Chiba, Satoru Yamamoto (Tohoku Univ.)
pp. 95 - 100

RECONF2012-41
A Design Framework for Reconfigurable IPs with VLSI CADs
Qian Zhao, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 101 - 106

RECONF2012-42
A Circuit Synthesis Algorithm and Evaluation for Coarse Grained Dynamic Reconfigurable Circuits
Nobuyuki Araki, Takashi Kambe (Kinki Univ.)
pp. 107 - 112

RECONF2012-43
An implementation and evaluation of variable speed charger for lithium-ion battery by PSoC
Satoshi Aoki, Takahito Hirata, Masahiro Fukui (Ritsumeikan Univ.)
pp. 113 - 118

RECONF2012-44
A Virus Scanning Engine Using an MPU and an IGU Based on ROW Shift Decomposition
Hiroki Nakahara (Kaoghima Univ.), Tsutomu Sasao, Munehiro Matsuura (KIT)
pp. 119 - 124

RECONF2012-45
Speedup of soft error tolerance evaluation with bootstrap method for FPGA systems
Kohei Takano, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 125 - 130

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan