IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Nonlinear Problems

Workshop Date : 2011-10-20 - 2011-10-21 / Issue Date : 2011-10-13

NLP2011-60
Evaluating the Risk of Nonlinear Prediction with the Bagging Algorithm
Kazuya Nakata, Tomoya Suzuki (Ibaraki Univ.)
pp. 1 - 6

NLP2011-61
Stock Portfolio Management with Nonlinear Timeseries Prediction
Satoshi Inose, Tomoya Suzuki (Ibaraki Univ.)
pp. 7 - 12

NLP2011-62
Multi-Objective Optimization Using Chaotic Neural Network
Masayuki Okazawa, Tomoya Suzuki (Ibaraki Univ.)
pp. 13 - 18

NLP2011-63
*
Akira Nomura, Hiroki Uchino, Hiroshi Umeo (OECU)
pp. 19 - 23

NLP2011-64
Analysis of Cascade Process in One-dimensional Cellular Automata
Shigeru Ninagawa (KIT)
pp. 25 - 29

NLP2011-65
Fast Electromagnetic Field Simulation by GPGPU-based Massively Parallel ADE-FDTD Method
Yuta Inoue, Masaki Unno, Shuichi Aono, Hideki Asai (Shizuoka Univ.)
pp. 31 - 36

NLP2011-66
Fast Circuit Simulation Based on Improved Latency Insertion Method with Predictor-Corrector Method
Hiroki Kurobe, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.)
pp. 37 - 42

NLP2011-67
Password Enhancement in Keystroke Dynamics with a Hamming Distance-like Filtering
Yoshihiro Kaneko (Gifu Univ.)
pp. 43 - 48

NLP2011-68
Fast Simulation of Multiconductor System with Nonlinear Devices by Using Block-Latency Insertion Method and Reduced Order Model
Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.)
pp. 49 - 54

NLP2011-69
A Time Domain Analysis for Nonuniform Transmission Line Discrete Using Hilbert Transform
Isao Kumazaki, Toshikazu Sekine, Yasuhiro Takahashi (Gifu Univ.)
pp. 55 - 60

NLP2011-70
[Invited Talk] Accelerating C-Based Complex Event Processing on FPGAs
Hiroaki Inoue, Takashi Takenaka (NEC)
pp. 61 - 66

NLP2011-71
Nonlinear dynamics and stability of an electric power system with multiple homes
Yoshihiko Susuki, Ryoya Kazaoka, Takashi Hikihara (Kyoto Univ.)
pp. 67 - 72

NLP2011-72
Synchronization phenomena in square-wave oscillators with optical couplings
Munehisa Sekikawa (The Univ. of Tokyo), Keiko Kimoto (JST), Takashi Kohno (The Univ. of Tokyo), Hiroshi Kawakami, Kazuyuki Aihara (The Univ. of Tokyo)
pp. 73 - 78

NLP2011-73
Mechanism of oscillation death and chaos in a weakly driven 4-segment piecewise-linear BVP oscillator
Hiroki Kita, Naohiko Inaba (Meiji Univ.), Munehisa Sekikawa (Univ. Tokyo), Yoshimasa Shinotsuka, Tetsuro Endo (Meiji Univ.)
pp. 79 - 83

NLP2011-74
A spiking neuron model with a rectangular threshold
Kenta Ohtsuka, Yusuke Matsuoka (YMCT)
pp. 85 - 88

NLP2011-75
Improvement of efficiency of simulation in mobile multi-hop wireless communications
Bungo Shimagaki, Keisuke Nakano, Kazuyuki Miyakita, Masakazu Sengoku (Niigata Univ.), Shoji Shinoda (Chuo Univ.)
pp. 89 - 94

NLP2011-76
Verification of Interference Avoidance Effect with Adaptive Channel Diversity
Yasutaka Serizawa, Kenichi Mizugaki, Takayoshi Fujioka, Ryosuke Fujiwara, Takashi Yano, Masayuki Miyazaki, Masaru Kokubo (Hitachi)
pp. 95 - 100

NLP2011-77
Low-Power Fully-Integrated K-band Transceiver using Transformer Direct-Stacking/Connecting and Balun Signal-Combining Techniques
Nobuhiro Shiramizu, Akihiro Nakamura, Takahiro Nakamura, Toru Masuda (Hitachi)
pp. 101 - 106

NLP2011-78
Simulation Investigation of a 60-GHz Differential Amplifier Design
Willy Hioe (Hitachi)
pp. 107 - 111

NLP2011-79
[Invited Talk] A 55-to-67GHz Power Amplifier with 13.6% PAE in 65nm standard CMOS
Tong Wang, Toshiya Mitomo, Naoko Ono, Osamu Watanabe (Toshiba)
pp. 113 - 118

NLP2011-80
Design and manufacture of an electronic circuit model of the CPG with afferent stimulation
Masahito Kubota, Tatsushi Domon, Yoshinobu Maeda, Atsuhiko Iijima (Niigata Univ.), Tomoyasu Ichimura (ONCT), Toyohiko Hayashi (Niigata Univ.)
pp. 119 - 124

NLP2011-81
Hardware bursting neuron model analyzed by a viewpoint of singularly perturbed dynamical system
Yoshinobu Maeda (Niigata Univ.)
pp. 125 - 128

NLP2011-82
Compensation of Voltage Unbalance in Series-Connected Voltage Balancing Circuit with Voltage Balance Monitor
Toshiki Kishi, Yohtaro Umeda (TUS)
pp. 129 - 134

NLP2011-83
[Invited Talk] Receiver Front-End Design for CMOS High-Speed I/O
Masaya Kibune, Hirotaka Tamura, Takuji Yamamoto (FLL)
pp. 135 - 140

NLP2011-84
White Noise Generation via Chaos from Phase-Locked Loops -- Simulation Study by LTspice --
Yuhei Chiba, Kyosuke Kato, Isao Imai, Tetsuro Endo (Meiji Univ.)
pp. 141 - 146

NLP2011-85
The 1/f Noise Generation in Charge-Pump Phase-Locked Loops -- Simulation Study by LT-SPICE --
Kyosuke Kato, Yuhei Chiba, Isao Imai, Tetsuro Endo (Meiji Univ.)
pp. 147 - 152

NLP2011-86
Stability Analysis in a Converter Circuit with Switching Delay
Hiroyuki Asahara (Oita Univ.), Soumitro Banerjee (IISER), Takuji Kousaka (Oita Univ.)
pp. 153 - 156

NLP2011-87
Bifurcation of Photovoltaic Switching Converters Having Discontinuous Conduction Mode
Jungo Onda, Toshimichi Saito (HU)
pp. 157 - 161

NLP2011-88
Exploring Maximum Power Point by Particle Swarm Optimization
Masaya Muraoka, Toshimichi Saito (HU)
pp. 163 - 168

NLP2011-89
Logical Synthesis based on ART-Maps
Yusuke Okamoto, Yuta Nakayama, Yoko Enosawa, Toshimichi Saito (HU)
pp. 169 - 173

NLP2011-90
Experimental Study on Excitation Parameters of Parametric Pendulum for Periodic States.
Takurou Oku (Kyoto Univ.), Yuuichi Yokoi (Nagasaki Univ.), Takashi Hikihara (Kyoto Univ.)
pp. 175 - 180

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan