Print edition: ISSN 0913-5685
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CPSY2006-65
Optimum Code Scheduling for Clustered VLIW DSP Using Pseudo Boolean Satisfiability
Ryo Kobayashi, Yuuki Masui, Nagisa Ishiura (Kwansei Gakuin Univ.)
pp. 1 - 5
CPSY2006-66
Test Suite for C Compilers and Its Generating Tool testgen
Yuki Uchiyama (Kwansei Gakuin Univ.), Nobuyuki Hikichi (SRA), Nagisa Ishiura, Yuji Nagamatsu (Kwansei Gakuin Univ.)
pp. 7 - 11
CPSY2006-67
Development of C-Compiler for Educational Microprocessor COMET II
Ken Matsuda, Akira Sato, Kensuke Mori, Toshiyuki Tsutsumi (Meiji Univ.)
pp. 13 - 18
CPSY2006-68
CoDaMa: An XML-based Framework for Manipulating CDFGs
Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)
pp. 19 - 24
CPSY2006-69
Model Checking of Cycle Accurate Hardware Behavior Models with Instantaneous Communication
Hirohisa Fujita, Masahiko Hamada, Tadaaki Tanimoto, Akio Nakata, Teruo Higashino (Osaka Univ.)
pp. 25 - 30
CPSY2006-70
Construction Method for a Circuit by Multiplication
Satoshi Yano, Hayato Higuchi, Taichi Nagamoto, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
pp. 31 - 35
CPSY2006-71
Analysis of design architecture of ePLX ( embedded Programmable Logic matriX) and Evaluation of circuit mapping
Tomoo Hishida, Kouta Ishibashi, Shun Kimura, Naoki Okuno, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.)
pp. 37 - 42
CPSY2006-72
Implementation of Dynamically Reconfigurable Processor MuCCRA
Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hiroki Matsutani, Vasutan Tunbunheng, Adepu Parimala, Takashi Nishimura, Masaru Kato, Shotaro Saito, Toru Sano, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.)
pp. 43 - 48
CPSY2006-73
A Scheduling Algorithm for Multicast Configuration
Satoshi Tsutsumi, Vasutan Tunbunheng, Yohei Hasegawa, Hiroki Matsutani, Adepu Parimala, Takuro Nakamura, Takashi Nishimura, Toru Sano, Masaru Kato, Shotaro Saito, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.)
pp. 49 - 54
CPSY2006-74
Adoption and Evaluation of FPGA Partial Reconfiguration for a Run-time Reconfigurable System
Yukinobu Kiyota, Taiichiro Yatsunami, Takeru Kisanuki, Hideaki Yoshihiro, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 55 - 60
CPSY2006-75
Design and Implementation of Self Run-time Partial Reconfiguration System
Yohei Hori (AIST), Hiroyuki Yokoyama (KDDI Labs.), Hirofumi Sakane, Kenji Toda (AIST)
pp. 61 - 68
CPSY2006-76
A Study of Efficient Context Switching Methods on Dynamically Reconfigurable Hardware
Masaharu Yoneda, Masaru Fukushi, Susumu Horiguchi (Tohoku Univ.)
pp. 69 - 74
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.