5月20日からの専門委員長、幹事、幹事補佐
専門委員長 最上徹 副委員長 徳光永輔
幹事 木本恒暢・堀川貢弘
★電子デバイス研究会 (ED)
専門委員長 上田大助 副委員長 水谷 孝
幹事 葛原正明・田上知紀
幹事補佐 山幡章司・筒井一生
5月20日からの専門委員長、副委員長、幹事、幹事補佐
専門委員長 上田大助 副委員長 水谷 孝
幹事 田上知紀・山幡章司 幹事補佐 筒井一生・亀山敦
日時:6月28日(水)8:45〜18:25
6月29日(木)8:30〜21:00
6月30日(金)8:30〜15:40
(若干の時間変更の可能性あり)
会場:プラザでいご(沖縄保養会館)
住所:沖縄県那覇市楚辺1-14-12
電話:TEL 098-855-5741
アクセス:那覇空港からタクシーで15分。
国際通りの裏道で、NTT沖縄支店の隣に位置しております。
近くで目印となる建物は、沖縄県庁、那覇高校、裁判所、中央公園、
城岳小学校があります。
議題:先端半導体デバイスの基礎と応用
2000 Asia-Pacific Workshop on Fundamental and Application of
Advanced Semiconductor Devices
28日午前
1. A New Self-Aligned Asymmetric Structure (SAAS) for 0.1um MOSFET Technology
○Chang-Soon Choi・Kyung-Whan Kim・Woo-Young Choi(Yonsei
University)
2. Excimer Laser Annealing for 0.1um MOSFET
○Takashi Noguchi・Michitaka Kubota・Hiroshi Yamamoto・
Kouichi Matsumoto・Machio Yamagishi(Sony)
3. Analysis of a Novel Self-Aligned Elevated Source Drain MOSFET
with Reduced Gate-Induced Drain Leakage Current
○Kyung-Whan Kim・Chang-Soon Choi・Woo-Young Choi(Yonsei
University)
4. [Invited] New Process Technologies for Copper/ Low-k Metallization
-- Abrasive-Free Copper CMP and New Low-k Material:
Methyl-silicon-oxycarbide --
○Kenji Hinode・Sei-ichi Kondo・Takeshi Furusawa・Noriyuki
Sakuma・
Daisuke Ryuzaki・Ken-ichi Takeka・Shun-taro Machida・Yasushi
Goto・
Hizuru Yamaguchi・Yoshio Homma(Hitachi)
5. Sub 4-nm Polyoxide Using ECR(Electron Cyclotron Resonance)
N_2O Plasma Oxidation
○Sangyeon Han・Hyungcheol Shin(KAIST)
6. Low Temperature Formation of Ultra-thin SiO_2 films Using Oxygen
Radicals and the Application for MOSFET Gate Insulator
○Masahiko Kanehiro・Yasuyuki Ueda・Tsunenobu Kimoto・
Hiroyuki Matsunami(Kyoto Univ.)
7. Oxidation Behaviors of Ti-Polycide Gate Stack During Gate Re-oxidation
○Tae-Kyun Kim・Se-Aug Jang・In-Seok Yeo・Jae-Sung Roh・
Jeong-Mo Hwang(Hyundai Electronics)
28日午後
8. [Invited] Prospects and Key Issues for III-V Compoud Semiconductor
Quantum Devices
○Hideki Hasegawa(Hokkaido Univ.)
9. [Invited] Lithography for 100nm and below at ASET
○Shinji Okazaki (ASET)
10. [Invited] A Novel Integration Technology for Gigabit DRAM with
0.115um Design Rule
○Sangdon Lee・Hyunpil Noh・Woncheol Cho・Jongrim
Lee・
Gucheol Jeong・Sung-keun Chang・Hyunjo Yang・Dongseok
Kim・
Junki Kim・Jisoo Park・Junsik Lee・Jinwon Park・Hee-Koo
Yoon
(Hyundai Electronics)
11. [Invited] CPU Technologies beyond GHz
Soocheol Lee・Youngwug Kim・Sungbae Park・○Kwangpyuk
Suh
(Samsung Electronics)
12. Demonstration of a Novel Multiple-valued T-gate using
Multiple-Junction Surface Tunnel Transistors and
Its Application
to Three-valued Data Flip-Flop
○Tetsuya Uemura・Toshio Baba(NEC)
13. Room Temperature Negative Differential Resistance of CdF_2-CaF_2
Resonant Tunneling Diode on Si(111)
○Masahiro Watanabe・Toshiyuki Funayama・Taishi
Teraji・
Naoto Sakamaki(Tokyo Institute of Technology)
14. Memory Operation of AlGaAs/GaAs Heterostructure FET with InAs
Quantum Dots
J.Nolde・T. Inayoshi・S. Kishimoto・○Takashi Mizutani
(Nagoya Univ.)
15. Implementation of the Single Electron Circuit Simulation by SPICE:
KOSEC-SPICE
YunSeop Yu(Korea Univ.)・Jung Hyun Oh(Univ. of Seoul)・
○SungWoo Hwang(Korea Univ.)・Doyeol Ahn(Univ. of
Seoul)
16. Calculation of Electrical Transport Properties for Novel
Single Gated Single Electron Transistors
○Bong Hoon-Lee・Moon-Young Jeong・Yoon-Ha Jeong
(Pohang Univ. of Science and Technology)
17. Application of Single Wall Carbon Nanotube to Nano Electron Devices
○Kazuhiko Matsumoto・Yoshitaka Gotoh・Seizo Kinosita・
Masami Ishii(Electrotechnical Laboratory)
29日午前
1. [Invited] High-Frequency AlGaN/GaN Heterostructure FETs
○Kaoru Inoue・Y. Ikeda・H. Masato・T. Matsuno・K. Nishii
(Matsushita Electronics)
2. Extraction of GaAs/InGaP HBT Small-Signal Equivalent Circuit
Based on a Genetic Algorithm
D.S. Chang・M.K. Rhee・J.S. Moon・○K.S. Yoon(Korea Univ.)・
C.S. Park(Information and Communications Univ.)
3. The New Cold HEMT Equivalent Circuit for Extracting Extrinsic
Resistance
D. S. Park・H. C. Cho・Y. S. Che・○J. K. Rhee(Dongguk
Univ.)
4. The Effect of He Gas on the Hydrogen Content and Passivation of
GaAs PHEMT with SiN Films
J. W. Shin・Y. S. Yoon・S. D. Lee・○J. K. Rhee(Dongguk
Univ.)
5. Optical Control of p-Channel MODFET
H.J.Kim・I.K.Han・○J.I.Lee(KIST)・D.M.Kim(Kookmin Univ.)
6. [Invited] Improvement of Memory Window in YMnO_3 Ferroelectric
Gate FET
○Yong Tae Kim・Ik Soo Kim・Young K. Park(Korea Institute
of
Science and Technology)
7. Optimization of Device Parameters for Ferroelectric-gate FETs
Using SrBi_2Ta_2O_9 and SrTa_2O_6/SiON Buffer Layer
○Eisuke Tokumitsu・Kojiro Okamoto・Hiroshi Ishiwara
(Tokyo Institute of Technology)
8. Calculation of Mobile Charge Density in Ferroelectric Films
Using TVS(Triangular Voltage Sweep) Method
○Kwang-Ho Kim・Yong-Seong Kim・Soon-Won Jung・Jin-Kyu
Kim・
Nam-Yeal Lee・Sang Hyun Jeong(Cheongju Univ)・
Byung-Gon Yu・Won-Jae Lee・In Kyu You・Yil-Suk Yang
(Electronics and Telecommunications Research Institute)
9. Ferroelectric Sputtering Technology for High-volume Ferroelectric
Memory Production
○Koukou Suu(ULVAC)
10. Plasma-MOCVD Processing of Ferroelectric Sr_2Bi_2Ta_2O_9 Films
and Their Electrical Properties
○B. K. Moon・K. Hironaka・C. Isobe・S. Hishikawa(Sony)
29日午後
11. [Invited] SiGe HBT Technology and Applications for Communication
○Byuung Ryul Ryum・Deok-Ho Cho・Tae-Hyun Han・Soo-Min
Lee・
Seung-Ho Lee・Young-Hyun Kim・Kyung-Sik Baek・Suk-Chan・Song・
Gil-Jae Lee・Kyung-Jun Eo・Chang-Uk Kim
(Advanced Semiconductor Business)
12. [Invited] Non-Self-Aligned InP/InGaAs HBT Technology and Its
Application to High-Speed Digital ICs
○Hiroki Nakajima,・Eiichi Sano・Minoru Ida・Shoji
Yamahata(NTT)
13. A Flip-Chip Packaged GaAs Switch IC Using 0.2um-Gate MODFET
○Kazuo Miyatsuji・Satoshi Makioka・Daisuke Ueda
(Matsushita Electronics)
14. PHEMT Super Low Noise MMIC Amplifier for 5.8 GHz HIPER LAN
Applications
B.G. Choi・Y.S. Lee・○C.S. Park(Information and
Communications
Univ.)・K.S. Yoon(Korea Univ.)
15. A Very High Gain C-band MMIC LNA Using 0.25um Pseudomorphic HEMT
Y.S. Lee・B.G. Choi・○C.S. Park(Information and
Communications
Univ.)
16. High Performance MMIC Power Amplifier for BWLL Applications
H. C. Bae・J. S. Yoon・D. An・○J. K. Rhee(Dongguk
Univ.)
30日午前
1. [Invited] SMC of a-Si in an Electric Field and Its Application to
TFT
○Jin Jang・S.J. Park・S.Y. Yoon・K.S. Cho(Kyung Hee University)
2. Reliability of Low Temperature Poly-Si TFT under Dynamic Stress
○Yukiharu Uraoka・Tomoaki Hatayama・Takashi Fuyuki(Nara
Institute
of Science and Technology)・
Tetsuya Kawamura・Yuji Tsuchihashi(Matsusita Electric)
3. High Performance CMOS Circuits Fabricated by Low Temperature Poly-Si
TFTs on a Glass Substrate
○Michiko Takei・Tatsuya Uematsu・Kenichi Yoshino・Fumiyo
Takeuchi・
Yasuyoshi Mishima・Nobuo Sasaki(Fujitsu)
4. Crystal Growth of Low-Temperature Process Poly-Si by Excimer Laser
Annealing - Dependences of Poly-Si Grain on Energy
Density and
Shot Number -
○Naoto Matsuo・Naoya Kawamoto・Ryou Taguchi(Yamaguchi
Univ.)・
Hisashi Abe・Tomoyuki Nouda・Hiroki Hamada(Sanyo Electric)
5. MOS Memory Using Si Nanocrystals Formed by Wet Etching of
Poly-Silicon Along Grain Boundaries
○Seong-jong Yoo(KAIST)・Jongho Lee(Wonkwang Univ.)・
Hyungcheol Shin(KAIST)
6. A 4 kV SiC Epitaxial PN Junction Diode with a Low On-Resistance
○Keiko Fujihira・Satoshi Tamura・Tsunenobu Kimoto・
Hiroyuki Matsunami(Kyoto Univ.)
7. Excimer Laser Doping for ZnO pn Diode Fabrication
○Toru Aoki(Shizuoka Univ.)・David C. Look(Wright State
Univ.)・
Yoshinori Hatanaka(Shizuoka Univ.)
8. 1/f Noise in Schottky Barrier Structure
○J.I.Lee・I.K.Han・H.J.Kim(KIST)
9. Characterisation of Semiconductor Structures in the VUV-UV Wavelength
Range Using Spectroscopic Ellipsometry and Spectroscopic
Photometry
○Pierre Boher・J. P. Piel・P. Evrard・C. Defranoux・J.
L. Sthele(SOPRA)・
Y. Suzuki・M. Kamiyama・S. Sakano(SEIKA)
10. Deep Sub-um Scale Photoluminescence Image of Wide Bandgap Materials
by Cryogenic Scanning Optical Microscope
○Masahiro Yoshimoto・Junji Saraie(Kyoto Institute
of Technology)
11. Fabrication and Device Application of Surface Acoustic Wave Coupled
with Semiconductor
○Chinami Kaneshiro・T. Suda・Y.Aoki・C.Hong・K.Koh・K.
Hohkawa
(Kanagawa Institute of Technology)
30日午後
12. A 0.5-um-rule Thin-film SOI Power MOSFET for Radio-frequency
Applications
○Satoshi Matsumoto・Yasushi Hiraoka・Tatsuo Sakai(NTT)
13. The Influence of Parasitic Bipolar Transistor on High-frequency
Performance of Thin-film SOI Power MOSFETs
○Yasushi Hiraoka・Satoshi Matsumoto・Tatsuo Sakai(NTT)
14. A Si RF Switch MMIC for the Cellular Frequency Band Using SOI-CMOS
Technology
○Atsushi Kanda・M. Muraguchi(NTT)
15. Photocurrent Amplification Using SOI-MOS Device
○Yuko Uryu・Tanemasa Asano(Kyushu Institute of
Technology)
16. Ultra Shallow Boron Diffusion in SIMOX and UNIBOND Structures
○Hideo Uchida・Masaya Ichimura・Eisuke Arai
(Nagoya Institute of Technology)
☆ SDM研究会今後の予定 [ ]内は発表申込締切日
7月 休会
8月24日(木)、8月25日(金)
「超高速、低消費電力、VLSI技術/デバイス技術」 北見工大 [6月9日(金)]
9月21日(木)、9月22日(金)
「プロセス・デバイス・回路シミュレーション」 機械振興会館 [7月14日(金)]