Summary

International Symposium on Nonlinear Theory and its Applications

2010

Session Number:A2L-B

Session:

Number:A2L-B4

An Improved Emulated Digital CNN Architecture for High Performance FPGAs

Laszlo Furedi,  Zoltan Nagy,  Andras Kiss,  Peter Szolgay,  

pp.103-106

Publication Date:2010/9/5

Online ISSN:2188-5079

DOI:10.34385/proc.44.A2L-B4

PDF download (165.5KB)

Summary:
Cellular Neural Network (CNN) is a prototype Single Instruction Multiple Data (SIMD) like architecture, where the basic operation of this architecture is the weighted sum calculation. The emulated digital CNN-UM architecture was implemented and tested on different kind of array computers, eg. Cell Broadband Engine (Cell BE), Field-Programmable Gate Arrays (FPGAs), for utilizing the high performance of the digital microprocessors. The arithmetic unit of the original Falcon architecture was mainly optimized for the special features of the Xilinx Virtex-II architecture. Implementing the same architecture on the new Digital Signal Processor (DSP) optimized FPGAs will be ineffcient. In order to achieve the highest possible performance the dedicated elements of the new FPGAs should be fully utilized. Therefore an improved arithmetic unit should be designed. According to the requirements of the new arithmetic unit the input data structure and the data-flow of the processor should be redesigned. Additionally the interconnection of the Falcon processing elements are optimized to utilize the specialized interconnect resources on the FPGA. Compared to the original Falcon processor with the modified implementation on the new FPGA families the clock frequency can be improved by 20 percent. Additionally the area requirement of the arithmetic unit is significantly reduced by utilizing the special features of the DSP blocks.