Summary

International Technical Conference on Circuits/Systems, Computers and Communications

2016

Session Number:M3-2

Session:

Number:M3-2-1

A Built-in Test Circuit for Injected Charge Tests of Open Defects in CMOS ICs

Kouhei Ohtani,  Daisuke Suga,  Hiroyuki Yotsuyanagi,  Masaki Hashizume ,  

pp.291-294

Publication Date:2016/7/10

Online ISSN:2188-5079

DOI:10.34385/proc.61.M3-2-1

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Summary:
In this paper, a built-in test circuit for an electrical test method is proposed to detect open defects in CMOS ICs. The test method is based on amount of charge injected from a power supply voltage source. A memory IC is prototyped in which the test circuit is embedded. It is examined experimentally whether an open defect in the IC can be detected with the test circuit. The experimental results show that an open defect in ICs can be detected by the test method.