Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2016
Session Number:M2-2
Session:
Number:M2-2-3
A Video Decoder Components Verification Scheme based on Transaction-level Information to Randomized Behavioral-level Operations Transformation
Jiayi Zhu, Shinji Kimura ,
pp.147-150
Publication Date:2016/7/10
Online ISSN:2188-5079
Summary:
In this article, we propose a video decoder components verification scheme based on the collaborations between reference software and VLSI test-bench. In the scheme, verilog models of DUT's neighbors translate the transaction-level information generated by the reference software to behavioral-level operations which interact with the DUT component. In addition, timing of the behavioral-level operations of these verilog models are randomized to improve the verification efficiency.