Summary

Asia-Pacific Conference on Communications

2008

Session Number:15-PM1-C

Session:

Number:1569123527

Technologies for High-speed and Power-efficient Routers and Switches

Masaki Yamada,  Hidehiro Toyoda,  Takeki Yazaki,  Shinji Nishimura,  

pp.-

Publication Date:2008/10/14

Online ISSN:2188-5079

DOI:10.34385/proc.27.1569123527

PDF download (556.5KB)

We worked on the physical layer model for implementing the optical DQPSK transmission function. In order to enable a high speed DQPSK transmission, a signal multiplexing and de-multiplexing module was needed. The multiplexing and de-multiplexing module exchanges a high frequency 2bit width data signal and a low frequency wide width data signal into each other. For creating such modules, the channel lengths of each low frequency signal must be kept even. We also worked on creating an evaluation board which consists a 64B/66B encoder and decoder, a gearbox, forward-error-correction (FEC) units, and the deskewing units by using two FPGA’s. By connecting four 10-Gbps Multiplexer/Demultiplexer LSIs to this board, a transmission rate of 40 Gbps was achieved.
As a different approach, we placed Dynamic Performance Control that cuts down the power consumption according to the received traffic, as required technologies for future routers and switches. Combining the two technologies together, a high-speed and power efficient routers and switches are achievable.