number | title/author |
---|---|
D4-1 | Low Cost PLD with High Speed Partial Reconfiguration Naoki Hirakawa, Masanori Yoshihara, Masayuki Sato, Kazuya Tanigawa, Tetsuo Hironaka, |
D4-2 | High Performance Level-Converting Flip-Flop with a Simple Pulse Generator and a Fast Latch Hyoun Soo Park, Hong Bo Che, Wook Kim, Young Hwan Kim, |
D4-3 | On Analog Circuit Design Methodology via Multi-Objective Geometric Programming Theerachet Soorapanth, |
D4-4 | On Objective Functions for Fixed-Outline Floorplanning Lu Wang, Xiaolin Zhang, Song Chen, Takeshi Yoshimura, |
D4-5 | A Design of Low Power MAC Operator with Fault Tolerance Han-Sam Jung, Sung-Kwan Ku, Ki-Seok Chung, |