number | title/author |
---|---|
D2-1 | FPGA implementation of parallel routing algorithm for three-stage Clos networks with component switch sizes of a power of two Koloko Labson, Hitoshi Obara, |
D2-2 | Convergence Improvement for Practical Delay-based Congestion Control Shotaro Ishikura, Miki Yamamoto, |
D2-3 | A repetitive network switching scheme without packet forwarding interruption for achieving a metabolic network Kosei YODA, Yu TAMURA, Yuta MIYAOKA, Junichi MURAYAMA, |
D2-4 | Survey and comparison of Interworking point routing mechanisms for IoT services in wide area ICNs Tetsuya YOKOTANI, Shinichi YAMAMOTO, Shuichi OHNO, Keiji SASABAYASHI, Koichi ISHIBASHI, |
D2-5 | Evaluation of Network Resource Allocation Based on Monitored Traffic Condition inspired by Human Brain Cognition Process Semin AN, Yuichi OHSITA, Masayuki MURATA, |