The 2008 International Symposium on Nonlinear Theory and its Applications

number title/author
B4L-D1Application of Latency Insertion Method to CMOS Circuit Simulation
Tadatoshi Sekine, Hideki Asai,
B4L-D2Stochastic Modeling and Verification of a 0.35 μm CMOS Chaos-based True Random Number Generator
Fabio Pareschi, Riccardo Rovatti, Gianluca Setti,
B4L-D3Functional Sigma-Delta CNN
Hisashi Aomori, Mamoru Tanaka,
B4L-D4Data Mining CNN to Circuit Modeling
Mamoru Tanaka, Yuko Zennyoji, Hisashi Aomori,