| Presentation | 2015-03-04 A Score-Based Hardware-Trojan Identification Method for Gate-Level Netlists Masaru OYA, Youhua SHI, Masao YANAGISAWA, Nozomu TOGAWA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recently, digital ICs are designed by outside vendors to reduce costs in semiconductor industry. This circumstance introduces risks that malicious attackers can implement Hardware Trojans (HTs) on them. In this paper, we propose an HT identification method for gate-level netlists without using a Golden netlist. Firstly, we extract several their features specific to Trojan nets using several HT-inserted benchmarks. Secondly, we give scores to Trojan net features and sum up them for each net in benchmarks. Then we can find out a score threshold to identify HTs. Experimental results demonstrate that our method successfully identify all the HT-inserted gate-level benchmarks to be HT-inserted and all the HT-free gate-level benchmarks to be HT-free in approximately three hours for each benchmark. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | hardware trojan / gate-level / netlist / trojan net / design phase |
| Paper # | VLD2014-182 |
| Date of Issue |
| Conference Information | |
| Committee | VLD |
|---|---|
| Conference Date | 2015/2/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Score-Based Hardware-Trojan Identification Method for Gate-Level Netlists |
| Sub Title (in English) | |
| Keyword(1) | hardware trojan |
| Keyword(2) | gate-level |
| Keyword(3) | netlist |
| Keyword(4) | trojan net |
| Keyword(5) | design phase |
| 1st Author's Name | Masaru OYA |
| 1st Author's Affiliation | Dept. Computer Science and Communication Engineering, Waseda University() |
| 2nd Author's Name | Youhua SHI |
| 2nd Author's Affiliation | Waseda Institute for Advanced Study, Waseda University |
| 3rd Author's Name | Masao YANAGISAWA |
| 3rd Author's Affiliation | Dept. Computer Science and Communication Engineering, Waseda University |
| 4th Author's Name | Nozomu TOGAWA |
| 4th Author's Affiliation | Dept. Computer Science and Communication Engineering, Waseda University |
| Date | 2015-03-04 |
| Paper # | VLD2014-182 |
| Volume (vol) | vol.114 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |